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Remove useless backup enabled checks in read handlers. 

Fix illegal halfword and byte reads.
This commit is contained in:
normmatt234 2013-10-22 18:04:02 +00:00
parent 2404d08f1f
commit 9e8671042b
1 changed files with 27 additions and 48 deletions
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51
src/gba/GBAinline.h
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@ -114,20 +114,11 @@ static inline u32 CPUReadMemory(u32 address)
value = READ32LE(((u32 *)&rom[address&0x1FFFFFC])); value = READ32LE(((u32 *)&rom[address&0x1FFFFFC]));
break; break;
case 13: case 13:
if(cpuEEPROMEnabled) value = eepromRead(address);
// no need to swap this break;
return eepromRead(address);
goto unreadable;
case 14: case 14:
case 15: case 15:
if(cpuFlashEnabled | cpuSramEnabled)
{ // no need to swap this
#ifdef __libretro__
return flashRead(address);
#else
value = flashRead(address) * 0x01010101; value = flashRead(address) * 0x01010101;
#endif
}
break; break;
// default // default
default: default:
@ -269,21 +260,12 @@ static inline u32 CPUReadHalfWord(u32 address)
value = READ16LE(((u16 *)&rom[address & 0x1FFFFFE])); value = READ16LE(((u16 *)&rom[address & 0x1FFFFFE]));
break; break;
case 13: case 13:
if(cpuEEPROMEnabled) value = eepromRead(address);
// no need to swap this break;
return eepromRead(address);
goto unreadable;
case 14: case 14:
case 15: case 15:
if(cpuFlashEnabled | cpuSramEnabled)
// no need to swap this
{
#ifdef __libretro__
return flashRead(address);
#else
value = flashRead(address) * 0x0101; value = flashRead(address) * 0x0101;
#endif break;
}
// default // default
default: default:
unreadable: unreadable:
@ -291,10 +273,9 @@ unreadable:
value = cpuDmaLast & 0xFFFF; value = cpuDmaLast & 0xFFFF;
} else { } else {
if(armState) { if(armState) {
value = CPUReadMemoryQuick(reg[15].I); value = CPUReadHalfWordQuick(reg[15].I + (address & 2));
} else { } else {
value = CPUReadHalfWordQuick(reg[15].I) | value = CPUReadHalfWordQuick(reg[15].I);
CPUReadHalfWordQuick(reg[15].I) << 16;
} }
} }
#ifdef GBA_LOGGING #ifdef GBA_LOGGING
@ -375,24 +356,23 @@ static inline u8 CPUReadByte(u32 address)
case 12: case 12:
return rom[address & 0x1FFFFFF]; return rom[address & 0x1FFFFFF];
case 13: case 13:
if(cpuEEPROMEnabled)
return eepromRead(address); return eepromRead(address);
goto unreadable;
case 14: case 14:
case 15: case 15:
if(cpuSramEnabled | cpuFlashEnabled) {
return flashRead(address); if (cpuEEPROMSensorEnabled) {
if(cpuEEPROMSensorEnabled) { switch (address & 0x00008f00) {
switch(address & 0x00008f00) {
case 0x8200: case 0x8200:
return systemGetSensorX() & 255; return systemGetSensorX() & 255;
case 0x8300: case 0x8300:
return (systemGetSensorX() >> 8)|0x80; return (systemGetSensorX() >> 8) | 0x80;
case 0x8400: case 0x8400:
return systemGetSensorY() & 255; return systemGetSensorY() & 255;
case 0x8500: case 0x8500:
return systemGetSensorY() >> 8; return systemGetSensorY() >> 8;
} }
}
return flashRead(address);
} }
// default // default
default: default:
@ -407,10 +387,9 @@ unreadable:
return cpuDmaLast & 0xFF; return cpuDmaLast & 0xFF;
} else { } else {
if(armState) { if(armState) {
return CPUReadMemoryQuick(reg[15].I); return CPUReadByteQuick(reg[15].I + (address & 3));
} else { } else {
return CPUReadHalfWordQuick(reg[15].I) | return CPUReadByteQuick(reg[15].I + (address & 1));
CPUReadHalfWordQuick(reg[15].I) << 16;
} }
} }
} }