beautified code
This commit is contained in:
spacy51
parent
1b80b3577d
commit
9c8d2d7049
118
src/agb/GBA.cpp
118
src/agb/GBA.cpp
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@ -2356,25 +2356,28 @@ void CPUCheckDMA(int reason, int dmamask)
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void CPUUpdateRegister(u32 address, u16 value)
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{
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switch(address) {
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switch(address)
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{
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case 0x00:
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{
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if ((value & 7) >5)
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DISPCNT = (value &7);
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bool change = ((DISPCNT ^ value) & 0x80) ? true : false;
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bool changeBG = ((DISPCNT ^ value) & 0x0F00) ? true : false;
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u16 changeBGon = (((~DISPCNT) & value) & 0x0F00);
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DISPCNT = (value & 0xFFF7);
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{ // we need to place the following code in { } because we declare & initialize variables in a case statement
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if((value & 7) > 5) {
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// display modes above 0-5 are prohibited
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DISPCNT = (value & 7);
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}
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bool change = (0 != ((DISPCNT ^ value) & 0x80));
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bool changeBG = (0 != ((DISPCNT ^ value) & 0x0F00));
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u16 changeBGon = ((~DISPCNT) & value) & 0x0F00; // these layers are being activated
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DISPCNT = (value & 0xFFF7); // bit 3 can only be accessed by the BIOS to enable GBC mode
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UPDATE_REG(0x00, DISPCNT);
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if (changeBGon)
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{
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layerEnableDelay=4;
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layerEnable = layerSettings & value & (~changeBGon);
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if(changeBGon) {
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layerEnableDelay = 4;
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layerEnable = layerSettings & value & (~changeBGon);
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} else {
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layerEnable = layerSettings & value;
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// CPUUpdateTicks();
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}
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else
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layerEnable = layerSettings & value;
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// CPUUpdateTicks();
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windowOn = (layerEnable & 0x6000) ? true : false;
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if(change && !((value & 0x80))) {
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@ -2390,10 +2393,11 @@ void CPUUpdateRegister(u32 address, u16 value)
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}
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CPUUpdateRender();
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// we only care about changes in BG0-BG3
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if(changeBG)
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if(changeBG) {
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CPUUpdateRenderBuffers(false);
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}
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break;
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}
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break;
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case 0x04:
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DISPSTAT = (value & 0xFF38) | (DISPSTAT & 7);
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UPDATE_REG(0x04, DISPSTAT);
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@ -2739,9 +2743,9 @@ void CPUUpdateRegister(u32 address, u16 value)
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}
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}
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break;
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case 0x100:
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case 0x100:
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timer0Reload = value;
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interp_rate();
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interp_rate();
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break;
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case 0x102:
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timer0Value = value;
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@ -2750,7 +2754,7 @@ void CPUUpdateRegister(u32 address, u16 value)
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break;
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case 0x104:
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timer1Reload = value;
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interp_rate();
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interp_rate();
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break;
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case 0x106:
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timer1Value = value;
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@ -2774,35 +2778,35 @@ void CPUUpdateRegister(u32 address, u16 value)
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cpuNextEvent = cpuTotalTicks;
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break;
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case 0x128:
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#ifdef LINK_EMULATION
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if (linkenable)
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{
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StartLink(value);
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}
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else
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#ifdef LINK_EMULATION
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if (linkenable)
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{
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StartLink(value);
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}
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else
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#endif
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{
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if(value & 0x80) {
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value &= 0xff7f;
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if(value & 1 && (value & 0x4000)) {
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UPDATE_REG(0x12a, 0xFF);
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IF |= 0x80;
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UPDATE_REG(0x202, IF);
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value &= 0x7f7f;
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}
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}
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UPDATE_REG(0x128, value);
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}
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{
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if(value & 0x80) {
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value &= 0xff7f;
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if(value & 1 && (value & 0x4000)) {
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UPDATE_REG(0x12a, 0xFF);
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IF |= 0x80;
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UPDATE_REG(0x202, IF);
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value &= 0x7f7f;
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}
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}
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UPDATE_REG(0x128, value);
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}
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break;
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case 0x12a:
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#ifdef LINK_EMULATION
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if(linkenable && lspeed)
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LinkSSend(value);
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#endif
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{
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UPDATE_REG(0x134, value);
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}
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break;
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case 0x12a:
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#ifdef LINK_EMULATION
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if(linkenable && lspeed)
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LinkSSend(value);
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#endif
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{
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UPDATE_REG(0x134, value);
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}
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break;
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case 0x130:
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P1 |= (value & 0x3FF);
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UPDATE_REG(0x130, P1);
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@ -2812,22 +2816,22 @@ void CPUUpdateRegister(u32 address, u16 value)
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break;
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case 0x134:
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#ifdef LINK_EMULATION
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if (linkenable)
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StartGPLink(value);
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else
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if (linkenable)
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StartGPLink(value);
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else
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#endif
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UPDATE_REG(0x134, value);
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UPDATE_REG(0x134, value);
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break;
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break;
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case 0x140:
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#ifdef LINK_EMULATION
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if (linkenable)
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StartJOYLink(value);
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else
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if (linkenable)
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StartJOYLink(value);
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else
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#endif
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UPDATE_REG(0x140, value);
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UPDATE_REG(0x140, value);
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break;
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break;
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case 0x200:
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IE = value & 0x3FFF;
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UPDATE_REG(0x200, IE);
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@ -17,8 +17,8 @@
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// along with this program; if not, write to the Free Software Foundation,
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// Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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#ifndef VBA_GBAinline_H
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#define VBA_GBAinline_H
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#ifndef GBAINLINE_H
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#define GBAINLINE_H
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#include "../System.h"
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#include "../Port.h"
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@ -67,7 +67,7 @@ static inline u32 CPUReadMemory(u32 address)
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if(address & 3) {
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if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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log("Unaligned word read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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}
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#endif
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@ -80,7 +80,7 @@ static inline u32 CPUReadMemory(u32 address)
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal word read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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@ -111,8 +111,8 @@ static inline u32 CPUReadMemory(u32 address)
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address = (address & 0x1fffc);
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if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
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{
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value = 0;
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break;
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value = 0;
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break;
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}
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if ((address & 0x18000) == 0x18000)
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address &= 0x17fff;
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@ -139,11 +139,11 @@ static inline u32 CPUReadMemory(u32 address)
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return flashRead(address);
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// default
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default:
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unreadable:
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unreadable:
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal word read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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@ -166,10 +166,10 @@ static inline u32 CPUReadMemory(u32 address)
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#else
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#ifdef __GNUC__
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asm("and $3, %%ecx;"
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"shl $3 ,%%ecx;"
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"ror %%cl, %0"
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: "=r" (value)
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: "r" (value), "c" (address));
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"shl $3 ,%%ecx;"
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"ror %%cl, %0"
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: "=r" (value)
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: "r" (value), "c" (address));
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#else
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__asm {
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mov ecx, address;
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@ -191,7 +191,7 @@ static inline u32 CPUReadHalfWord(u32 address)
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if(address & 1) {
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if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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log("Unaligned halfword read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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}
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#endif
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@ -205,7 +205,7 @@ static inline u32 CPUReadHalfWord(u32 address)
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal halfword read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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value = READ16LE(((u16 *)&biosProtected[address&2]));
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@ -228,14 +228,14 @@ static inline u32 CPUReadHalfWord(u32 address)
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if (((address & 0x3fe) == 0x100) && timer0On)
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value = 0xFFFF - ((timer0Ticks-cpuTotalTicks) >> timer0ClockReload);
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else
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if (((address & 0x3fe) == 0x104) && timer1On && !(TM1CNT & 4))
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value = 0xFFFF - ((timer1Ticks-cpuTotalTicks) >> timer1ClockReload);
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else
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if (((address & 0x3fe) == 0x108) && timer2On && !(TM2CNT & 4))
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value = 0xFFFF - ((timer2Ticks-cpuTotalTicks) >> timer2ClockReload);
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else
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if (((address & 0x3fe) == 0x10C) && timer3On && !(TM3CNT & 4))
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value = 0xFFFF - ((timer3Ticks-cpuTotalTicks) >> timer3ClockReload);
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if (((address & 0x3fe) == 0x104) && timer1On && !(TM1CNT & 4))
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value = 0xFFFF - ((timer1Ticks-cpuTotalTicks) >> timer1ClockReload);
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else
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if (((address & 0x3fe) == 0x108) && timer2On && !(TM2CNT & 4))
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value = 0xFFFF - ((timer2Ticks-cpuTotalTicks) >> timer2ClockReload);
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else
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if (((address & 0x3fe) == 0x10C) && timer3On && !(TM3CNT & 4))
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value = 0xFFFF - ((timer3Ticks-cpuTotalTicks) >> timer3ClockReload);
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}
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}
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else goto unreadable;
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@ -247,8 +247,8 @@ static inline u32 CPUReadHalfWord(u32 address)
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address = (address & 0x1fffe);
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if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
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{
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value = 0;
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break;
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value = 0;
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break;
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}
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if ((address & 0x18000) == 0x18000)
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address &= 0x17fff;
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@ -278,11 +278,11 @@ static inline u32 CPUReadHalfWord(u32 address)
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return flashRead(address);
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// default
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default:
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unreadable:
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unreadable:
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal halfword read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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if(cpuDmaHack) {
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@ -321,7 +321,7 @@ static inline u8 CPUReadByte(u32 address)
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal byte read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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return biosProtected[address & 3];
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@ -341,7 +341,7 @@ static inline u8 CPUReadByte(u32 address)
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case 6:
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address = (address & 0x1ffff);
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if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
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return 0;
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return 0;
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if ((address & 0x18000) == 0x18000)
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address &= 0x17fff;
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return vram[address];
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@ -362,23 +362,23 @@ static inline u8 CPUReadByte(u32 address)
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return flashRead(address);
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if(cpuEEPROMSensorEnabled) {
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switch(address & 0x00008f00) {
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case 0x8200:
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return systemGetSensorX() & 255;
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case 0x8300:
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return (systemGetSensorX() >> 8)|0x80;
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case 0x8400:
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return systemGetSensorY() & 255;
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case 0x8500:
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return systemGetSensorY() >> 8;
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case 0x8200:
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return systemGetSensorX() & 255;
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case 0x8300:
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return (systemGetSensorX() >> 8)|0x80;
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case 0x8400:
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return systemGetSensorY() & 255;
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case 0x8500:
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return systemGetSensorY() >> 8;
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}
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}
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// default
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default:
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unreadable:
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unreadable:
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal byte read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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if(cpuDmaHack) {
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@ -401,9 +401,9 @@ static inline void CPUWriteMemory(u32 address, u32 value)
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if(address & 3) {
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if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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log("Unaligned word write: %08x to %08x from %08x\n",
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value,
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address,
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armMode ? armNextPC - 4 : armNextPC - 2);
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value,
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address,
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armMode ? armNextPC - 4 : armNextPC - 2);
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}
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}
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#endif
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@ -413,7 +413,7 @@ static inline void CPUWriteMemory(u32 address, u32 value)
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#ifdef BKPT_SUPPORT
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if(*((u32 *)&freezeWorkRAM[address & 0x3FFFC]))
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cheatsWriteMemory(address & 0x203FFFC,
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value);
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value);
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else
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#endif
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WRITE32LE(((u32 *)&workRAM[address & 0x3FFFC]), value);
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@ -422,7 +422,7 @@ static inline void CPUWriteMemory(u32 address, u32 value)
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#ifdef BKPT_SUPPORT
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if(*((u32 *)&freezeInternalRAM[address & 0x7ffc]))
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cheatsWriteMemory(address & 0x3007FFC,
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value);
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value);
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else
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#endif
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WRITE32LE(((u32 *)&internalRAM[address & 0x7ffC]), value);
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@ -437,15 +437,15 @@ static inline void CPUWriteMemory(u32 address, u32 value)
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#ifdef BKPT_SUPPORT
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if(*((u32 *)&freezePRAM[address & 0x3fc]))
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cheatsWriteMemory(address & 0x70003FC,
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value);
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value);
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else
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#endif
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WRITE32LE(((u32 *)&paletteRAM[address & 0x3FC]), value);
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WRITE32LE(((u32 *)&paletteRAM[address & 0x3FC]), value);
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break;
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case 0x06:
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address = (address & 0x1fffc);
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if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
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return;
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return;
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if ((address & 0x18000) == 0x18000)
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address &= 0x17fff;
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@ -455,16 +455,16 @@ static inline void CPUWriteMemory(u32 address, u32 value)
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else
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#endif
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WRITE32LE(((u32 *)&vram[address]), value);
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WRITE32LE(((u32 *)&vram[address]), value);
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break;
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case 0x07:
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#ifdef BKPT_SUPPORT
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if(*((u32 *)&freezeOAM[address & 0x3fc]))
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cheatsWriteMemory(address & 0x70003FC,
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value);
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value);
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else
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#endif
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WRITE32LE(((u32 *)&oam[address & 0x3fc]), value);
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WRITE32LE(((u32 *)&oam[address & 0x3fc]), value);
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break;
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case 0x0D:
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if(cpuEEPROMEnabled) {
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@ -479,13 +479,13 @@ static inline void CPUWriteMemory(u32 address, u32 value)
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}
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// default
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default:
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unwritable:
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unwritable:
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_WRITE) {
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log("Illegal word write: %08x to %08x from %08x\n",
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value,
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address,
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armMode ? armNextPC - 4 : armNextPC - 2);
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value,
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address,
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armMode ? armNextPC - 4 : armNextPC - 2);
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}
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#endif
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||||
break;
|
||||
|
|
@ -498,9 +498,9 @@ static inline void CPUWriteHalfWord(u32 address, u16 value)
|
|||
if(address & 1) {
|
||||
if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
|
||||
log("Unaligned halfword write: %04x to %08x from %08x\n",
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
@ -510,7 +510,7 @@ static inline void CPUWriteHalfWord(u32 address, u16 value)
|
|||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeWorkRAM[address & 0x3FFFE]))
|
||||
cheatsWriteHalfWord(address & 0x203FFFE,
|
||||
value);
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&workRAM[address & 0x3FFFE]),value);
|
||||
|
|
@ -519,7 +519,7 @@ static inline void CPUWriteHalfWord(u32 address, u16 value)
|
|||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeInternalRAM[address & 0x7ffe]))
|
||||
cheatsWriteHalfWord(address & 0x3007ffe,
|
||||
value);
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&internalRAM[address & 0x7ffe]), value);
|
||||
|
|
@ -533,33 +533,33 @@ static inline void CPUWriteHalfWord(u32 address, u16 value)
|
|||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezePRAM[address & 0x03fe]))
|
||||
cheatsWriteHalfWord(address & 0x70003fe,
|
||||
value);
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&paletteRAM[address & 0x3fe]), value);
|
||||
WRITE16LE(((u16 *)&paletteRAM[address & 0x3fe]), value);
|
||||
break;
|
||||
case 6:
|
||||
address = (address & 0x1fffe);
|
||||
if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
|
||||
return;
|
||||
return;
|
||||
if ((address & 0x18000) == 0x18000)
|
||||
address &= 0x17fff;
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeVRAM[address]))
|
||||
cheatsWriteHalfWord(address + 0x06000000,
|
||||
value);
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&vram[address]), value);
|
||||
WRITE16LE(((u16 *)&vram[address]), value);
|
||||
break;
|
||||
case 7:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeOAM[address & 0x03fe]))
|
||||
cheatsWriteHalfWord(address & 0x70003fe,
|
||||
value);
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&oam[address & 0x3fe]), value);
|
||||
WRITE16LE(((u16 *)&oam[address & 0x3fe]), value);
|
||||
break;
|
||||
case 8:
|
||||
case 9:
|
||||
|
|
@ -581,13 +581,13 @@ static inline void CPUWriteHalfWord(u32 address, u16 value)
|
|||
}
|
||||
goto unwritable;
|
||||
default:
|
||||
unwritable:
|
||||
unwritable:
|
||||
#ifdef GBA_LOGGING
|
||||
if(systemVerbose & VERBOSE_ILLEGAL_WRITE) {
|
||||
log("Illegal halfword write: %04x to %08x from %08x\n",
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
|
|
@ -599,11 +599,11 @@ static inline void CPUWriteByte(u32 address, u8 b)
|
|||
switch(address >> 24) {
|
||||
case 2:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(freezeWorkRAM[address & 0x3FFFF])
|
||||
cheatsWriteByte(address & 0x203FFFF, b);
|
||||
else
|
||||
if(freezeWorkRAM[address & 0x3FFFF])
|
||||
cheatsWriteByte(address & 0x203FFFF, b);
|
||||
else
|
||||
#endif
|
||||
workRAM[address & 0x3FFFF] = b;
|
||||
workRAM[address & 0x3FFFF] = b;
|
||||
break;
|
||||
case 3:
|
||||
#ifdef BKPT_SUPPORT
|
||||
|
|
@ -616,13 +616,6 @@ static inline void CPUWriteByte(u32 address, u8 b)
|
|||
case 4:
|
||||
if(address < 0x4000400) {
|
||||
switch(address & 0x3FF) {
|
||||
case 0x301:
|
||||
if(b == 0x80)
|
||||
stopState = true;
|
||||
holdState = 1;
|
||||
holdType = -1;
|
||||
cpuNextEvent = cpuTotalTicks;
|
||||
break;
|
||||
case 0x60:
|
||||
case 0x61:
|
||||
case 0x62:
|
||||
|
|
@ -663,17 +656,22 @@ static inline void CPUWriteByte(u32 address, u8 b)
|
|||
case 0x9d:
|
||||
case 0x9e:
|
||||
case 0x9f:
|
||||
soundEvent(address&0xFF, b);
|
||||
break;
|
||||
default:
|
||||
if(address & 1)
|
||||
CPUUpdateRegister(address & 0x3fe,
|
||||
((READ16LE(((u16 *)&ioMem[address & 0x3fe])))
|
||||
& 0x00FF) |
|
||||
b<<8);
|
||||
else
|
||||
CPUUpdateRegister(address & 0x3fe,
|
||||
((READ16LE(((u16 *)&ioMem[address & 0x3fe])) & 0xFF00) | b));
|
||||
soundEvent(address&0xFF, b);
|
||||
break;
|
||||
case 0x301: // HALTCNT, undocumented
|
||||
if(b == 0x80)
|
||||
stopState = true;
|
||||
holdState = 1;
|
||||
holdType = -1;
|
||||
cpuNextEvent = cpuTotalTicks;
|
||||
break;
|
||||
default: // every other register
|
||||
u32 lowerBits = address & 0x3fe;
|
||||
if(address & 1) {
|
||||
CPUUpdateRegister(lowerBits, (READ16LE(&ioMem[lowerBits]) & 0x00FF) | (b << 8));
|
||||
} else {
|
||||
CPUUpdateRegister(lowerBits, (READ16LE(&ioMem[lowerBits]) & 0xFF00) | b);
|
||||
}
|
||||
}
|
||||
break;
|
||||
} else goto unwritable;
|
||||
|
|
@ -685,7 +683,7 @@ static inline void CPUWriteByte(u32 address, u8 b)
|
|||
case 6:
|
||||
address = (address & 0x1fffe);
|
||||
if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
|
||||
return;
|
||||
return;
|
||||
if ((address & 0x18000) == 0x18000)
|
||||
address &= 0x17fff;
|
||||
|
||||
|
|
@ -698,7 +696,7 @@ static inline void CPUWriteByte(u32 address, u8 b)
|
|||
cheatsWriteByte(address + 0x06000000, b);
|
||||
else
|
||||
#endif
|
||||
*((u16 *)&vram[address]) = (b << 8) | b;
|
||||
*((u16 *)&vram[address]) = (b << 8) | b;
|
||||
}
|
||||
break;
|
||||
case 7:
|
||||
|
|
@ -713,26 +711,26 @@ static inline void CPUWriteByte(u32 address, u8 b)
|
|||
}
|
||||
goto unwritable;
|
||||
case 14:
|
||||
if (!(saveType == 5) && (!eepromInUse | cpuSramEnabled | cpuFlashEnabled)) {
|
||||
if (!(saveType == 5) && (!eepromInUse | cpuSramEnabled | cpuFlashEnabled)) {
|
||||
|
||||
//if(!cpuEEPROMEnabled && (cpuSramEnabled | cpuFlashEnabled)) {
|
||||
//if(!cpuEEPROMEnabled && (cpuSramEnabled | cpuFlashEnabled)) {
|
||||
|
||||
(*cpuSaveGameFunc)(address, b);
|
||||
(*cpuSaveGameFunc)(address, b);
|
||||
break;
|
||||
}
|
||||
// default
|
||||
default:
|
||||
unwritable:
|
||||
unwritable:
|
||||
#ifdef GBA_LOGGING
|
||||
if(systemVerbose & VERBOSE_ILLEGAL_WRITE) {
|
||||
log("Illegal byte write: %02x to %08x from %08x\n",
|
||||
b,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC -2 );
|
||||
b,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC -2 );
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif //VBA_GBAinline_H
|
||||
#endif //GBAINLINE_H
|
||||
|
|
|
|||
Loading…
Reference in New Issue