reupped untouched versions (pending proper migration of the sensor functions from VBA-GX
git-svn-id: https://svn.code.sf.net/p/vbam/code/trunk@923 a31d4220-a93d-0410-bf67-fe4944624d44
This commit is contained in:
parent
4aa84b20c8
commit
7d1e3e189a
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@ -0,0 +1,92 @@
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#ifndef SYSTEM_H
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#define SYSTEM_H
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#include "common/Types.h"
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#include <zlib.h>
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class SoundDriver;
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struct EmulatedSystem {
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// main emulation function
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void (*emuMain)(int);
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// reset emulator
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void (*emuReset)();
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// clean up memory
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void (*emuCleanUp)();
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// load battery file
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bool (*emuReadBattery)(const char *);
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// write battery file
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bool (*emuWriteBattery)(const char *);
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// load state
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bool (*emuReadState)(const char *);
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// save state
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bool (*emuWriteState)(const char *);
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// load memory state (rewind)
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bool (*emuReadMemState)(char *, int);
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// write memory state (rewind)
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bool (*emuWriteMemState)(char *, int);
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// write PNG file
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bool (*emuWritePNG)(const char *);
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// write BMP file
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bool (*emuWriteBMP)(const char *);
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// emulator update CPSR (ARM only)
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void (*emuUpdateCPSR)();
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// emulator has debugger
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bool emuHasDebugger;
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// clock ticks to emulate
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int emuCount;
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};
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extern void log(const char *,...);
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extern bool systemPauseOnFrame();
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extern void systemGbPrint(u8 *,int,int,int,int);
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extern void systemScreenCapture(int);
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extern void systemDrawScreen();
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// updates the joystick data
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extern bool systemReadJoypads();
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// return information about the given joystick, -1 for default joystick
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extern u32 systemReadJoypad(int);
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extern u32 systemGetClock();
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extern void systemMessage(int, const char *, ...);
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extern void systemSetTitle(const char *);
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extern SoundDriver * systemSoundInit();
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extern void systemOnWriteDataToSoundBuffer(const u16 * finalWave, int length);
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extern void systemOnSoundShutdown();
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extern void systemScreenMessage(const char *);
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extern void systemUpdateMotionSensor();
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extern int systemGetSensorX();
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extern int systemGetSensorY();
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extern bool systemCanChangeSoundQuality();
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extern void systemShowSpeed(int);
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extern void system10Frames(int);
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extern void systemFrame();
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extern void systemGbBorderOn();
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extern void Sm60FPS_Init();
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extern bool Sm60FPS_CanSkipFrame();
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extern void Sm60FPS_Sleep();
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extern void DbgMsg(const char *msg, ...);
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extern void winlog(const char *,...);
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extern void (*dbgOutput)(const char *s, u32 addr);
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extern void (*dbgSignal)(int sig,int number);
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extern u16 systemColorMap16[0x10000];
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extern u32 systemColorMap32[0x10000];
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extern u16 systemGbPalette[24];
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extern int systemRedShift;
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extern int systemGreenShift;
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extern int systemBlueShift;
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extern int systemColorDepth;
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extern int systemDebug;
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extern int systemVerbose;
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extern int systemFrameSkip;
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extern int systemSaveUpdateCounter;
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extern int systemSpeed;
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#define SYSTEM_SAVE_UPDATED 30
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#define SYSTEM_SAVE_NOT_UPDATED 0
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#endif // SYSTEM_H
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -103,22 +103,24 @@ union u8h
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{
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struct
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{
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/* 0*/ unsigned lo:4;
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/* 4*/ unsigned hi:4;
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/* 0*/ unsigned lo:4;
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/* 4*/ unsigned hi:4;
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} __attribute__ ((packed));
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u8 val;
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};
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#else
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#else
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union u8h
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{
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#pragma pack(1)
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struct
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{
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unsigned lo:4;
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unsigned hi:4;};
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__declspec(align(8)) struct
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{
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unsigned lo:2;
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unsigned hi:2;
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};
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u8 val;
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};
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#endif
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union TileEntry
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@ -0,0 +1,717 @@
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#ifndef GBAINLINE_H
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#define GBAINLINE_H
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#include "../System.h"
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#include "../common/Port.h"
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#include "RTC.h"
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#include "Sound.h"
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#include "agbprint.h"
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extern const u32 objTilesAddress[3];
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extern bool stopState;
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extern bool holdState;
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extern int holdType;
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extern int cpuNextEvent;
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extern bool cpuSramEnabled;
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extern bool cpuFlashEnabled;
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extern bool cpuEEPROMEnabled;
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extern bool cpuEEPROMSensorEnabled;
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extern bool cpuDmaHack;
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extern u32 cpuDmaLast;
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extern bool timer0On;
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extern int timer0Ticks;
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extern int timer0ClockReload;
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extern bool timer1On;
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extern int timer1Ticks;
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extern int timer1ClockReload;
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extern bool timer2On;
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extern int timer2Ticks;
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extern int timer2ClockReload;
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extern bool timer3On;
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extern int timer3Ticks;
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extern int timer3ClockReload;
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extern int cpuTotalTicks;
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#define CPUReadByteQuick(addr) \
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map[(addr)>>24].address[(addr) & map[(addr)>>24].mask]
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#define CPUReadHalfWordQuick(addr) \
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READ16LE(((u16*)&map[(addr)>>24].address[(addr) & map[(addr)>>24].mask]))
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#define CPUReadMemoryQuick(addr) \
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READ32LE(((u32*)&map[(addr)>>24].address[(addr) & map[(addr)>>24].mask]))
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static inline u32 CPUReadMemory(u32 address)
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{
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#ifdef GBA_LOGGING
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if(address & 3) {
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if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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log("Unaligned word read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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}
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}
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#endif
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u32 value;
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switch(address >> 24) {
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case 0:
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if(reg[15].I >> 24) {
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if(address < 0x4000) {
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal word read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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value = READ32LE(((u32 *)&biosProtected));
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}
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else goto unreadable;
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} else
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value = READ32LE(((u32 *)&bios[address & 0x3FFC]));
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break;
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case 2:
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value = READ32LE(((u32 *)&workRAM[address & 0x3FFFC]));
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break;
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case 3:
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value = READ32LE(((u32 *)&internalRAM[address & 0x7ffC]));
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break;
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case 4:
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if((address < 0x4000400) && ioReadable[address & 0x3fc]) {
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if(ioReadable[(address & 0x3fc) + 2])
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value = READ32LE(((u32 *)&ioMem[address & 0x3fC]));
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else
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value = READ16LE(((u16 *)&ioMem[address & 0x3fc]));
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} else goto unreadable;
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break;
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case 5:
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value = READ32LE(((u32 *)&paletteRAM[address & 0x3fC]));
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break;
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case 6:
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address = (address & 0x1fffc);
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if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
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{
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value = 0;
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break;
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}
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if ((address & 0x18000) == 0x18000)
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address &= 0x17fff;
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value = READ32LE(((u32 *)&vram[address]));
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break;
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case 7:
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value = READ32LE(((u32 *)&oam[address & 0x3FC]));
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break;
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case 8:
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case 9:
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case 10:
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case 11:
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case 12:
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value = READ32LE(((u32 *)&rom[address&0x1FFFFFC]));
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break;
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case 13:
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if(cpuEEPROMEnabled)
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// no need to swap this
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return eepromRead(address);
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goto unreadable;
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case 14:
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if(cpuFlashEnabled | cpuSramEnabled)
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// no need to swap this
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return flashRead(address);
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// default
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default:
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unreadable:
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal word read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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if(cpuDmaHack) {
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value = cpuDmaLast;
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} else {
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if(armState) {
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value = CPUReadMemoryQuick(reg[15].I);
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} else {
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value = CPUReadHalfWordQuick(reg[15].I) |
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CPUReadHalfWordQuick(reg[15].I) << 16;
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}
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}
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}
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if(address & 3) {
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#ifdef C_CORE
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int shift = (address & 3) << 3;
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value = (value >> shift) | (value << (32 - shift));
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#else
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#ifdef __GNUC__
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asm("and $3, %%ecx;"
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"shl $3 ,%%ecx;"
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"ror %%cl, %0"
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: "=r" (value)
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: "r" (value), "c" (address));
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#else
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__asm {
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mov ecx, address;
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and ecx, 3;
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shl ecx, 3;
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ror [dword ptr value], cl;
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}
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#endif
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#endif
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}
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return value;
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}
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extern u32 myROM[];
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static inline u32 CPUReadHalfWord(u32 address)
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{
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#ifdef GBA_LOGGING
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if(address & 1) {
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if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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log("Unaligned halfword read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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}
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}
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#endif
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u32 value;
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switch(address >> 24) {
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case 0:
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if (reg[15].I >> 24) {
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if(address < 0x4000) {
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#ifdef GBA_LOGGING
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal halfword read: %08x at %08x\n", address, armMode ?
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armNextPC - 4 : armNextPC - 2);
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}
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#endif
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value = READ16LE(((u16 *)&biosProtected[address&2]));
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} else goto unreadable;
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} else
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value = READ16LE(((u16 *)&bios[address & 0x3FFE]));
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break;
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case 2:
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value = READ16LE(((u16 *)&workRAM[address & 0x3FFFE]));
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break;
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case 3:
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value = READ16LE(((u16 *)&internalRAM[address & 0x7ffe]));
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break;
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case 4:
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if((address < 0x4000400) && ioReadable[address & 0x3fe])
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{
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value = READ16LE(((u16 *)&ioMem[address & 0x3fe]));
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if (((address & 0x3fe)>0xFF) && ((address & 0x3fe)<0x10E))
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{
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if (((address & 0x3fe) == 0x100) && timer0On)
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value = 0xFFFF - ((timer0Ticks-cpuTotalTicks) >> timer0ClockReload);
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else
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if (((address & 0x3fe) == 0x104) && timer1On && !(TM1CNT & 4))
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value = 0xFFFF - ((timer1Ticks-cpuTotalTicks) >> timer1ClockReload);
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else
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if (((address & 0x3fe) == 0x108) && timer2On && !(TM2CNT & 4))
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value = 0xFFFF - ((timer2Ticks-cpuTotalTicks) >> timer2ClockReload);
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else
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if (((address & 0x3fe) == 0x10C) && timer3On && !(TM3CNT & 4))
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value = 0xFFFF - ((timer3Ticks-cpuTotalTicks) >> timer3ClockReload);
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}
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}
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else goto unreadable;
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break;
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case 5:
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value = READ16LE(((u16 *)&paletteRAM[address & 0x3fe]));
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break;
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case 6:
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address = (address & 0x1fffe);
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if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
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{
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value = 0;
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break;
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}
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if ((address & 0x18000) == 0x18000)
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address &= 0x17fff;
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value = READ16LE(((u16 *)&vram[address]));
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break;
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case 7:
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value = READ16LE(((u16 *)&oam[address & 0x3fe]));
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break;
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case 8:
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case 9:
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case 10:
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case 11:
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case 12:
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if(address == 0x80000c4 || address == 0x80000c6 || address == 0x80000c8)
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value = rtcRead(address);
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else
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value = READ16LE(((u16 *)&rom[address & 0x1FFFFFE]));
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break;
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case 13:
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if(cpuEEPROMEnabled)
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// no need to swap this
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return eepromRead(address);
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goto unreadable;
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case 14:
|
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if(cpuFlashEnabled | cpuSramEnabled)
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// no need to swap this
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return flashRead(address);
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// default
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default:
|
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unreadable:
|
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#ifdef GBA_LOGGING
|
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if(systemVerbose & VERBOSE_ILLEGAL_READ) {
|
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log("Illegal halfword read: %08x at %08x\n", address, armMode ?
|
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armNextPC - 4 : armNextPC - 2);
|
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}
|
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#endif
|
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if(cpuDmaHack) {
|
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value = cpuDmaLast & 0xFFFF;
|
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} else {
|
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if(armState) {
|
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value = CPUReadHalfWordQuick(reg[15].I + (address & 2));
|
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} else {
|
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value = CPUReadHalfWordQuick(reg[15].I);
|
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}
|
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}
|
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break;
|
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}
|
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|
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if(address & 1) {
|
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value = (value >> 8) | (value << 24);
|
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}
|
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|
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return value;
|
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}
|
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|
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static inline u16 CPUReadHalfWordSigned(u32 address)
|
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{
|
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u16 value = CPUReadHalfWord(address);
|
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if((address & 1))
|
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value = (s8)value;
|
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return value;
|
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}
|
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|
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static inline u8 CPUReadByte(u32 address)
|
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{
|
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switch(address >> 24) {
|
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case 0:
|
||||
if (reg[15].I >> 24) {
|
||||
if(address < 0x4000) {
|
||||
#ifdef GBA_LOGGING
|
||||
if(systemVerbose & VERBOSE_ILLEGAL_READ) {
|
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log("Illegal byte read: %08x at %08x\n", address, armMode ?
|
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armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
#endif
|
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return biosProtected[address & 3];
|
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} else goto unreadable;
|
||||
}
|
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return bios[address & 0x3FFF];
|
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case 2:
|
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return workRAM[address & 0x3FFFF];
|
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case 3:
|
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return internalRAM[address & 0x7fff];
|
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case 4:
|
||||
if((address < 0x4000400) && ioReadable[address & 0x3ff])
|
||||
return ioMem[address & 0x3ff];
|
||||
else goto unreadable;
|
||||
case 5:
|
||||
return paletteRAM[address & 0x3ff];
|
||||
case 6:
|
||||
address = (address & 0x1ffff);
|
||||
if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
|
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return 0;
|
||||
if ((address & 0x18000) == 0x18000)
|
||||
address &= 0x17fff;
|
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return vram[address];
|
||||
case 7:
|
||||
return oam[address & 0x3ff];
|
||||
case 8:
|
||||
case 9:
|
||||
case 10:
|
||||
case 11:
|
||||
case 12:
|
||||
return rom[address & 0x1FFFFFF];
|
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case 13:
|
||||
if(cpuEEPROMEnabled)
|
||||
return eepromRead(address);
|
||||
goto unreadable;
|
||||
case 14:
|
||||
if(cpuSramEnabled | cpuFlashEnabled)
|
||||
return flashRead(address);
|
||||
if(cpuEEPROMSensorEnabled) {
|
||||
switch(address & 0x00008f00) {
|
||||
case 0x8200:
|
||||
return systemGetSensorX() & 255;
|
||||
case 0x8300:
|
||||
return (systemGetSensorX() >> 8)|0x80;
|
||||
case 0x8400:
|
||||
return systemGetSensorY() & 255;
|
||||
case 0x8500:
|
||||
return systemGetSensorY() >> 8;
|
||||
}
|
||||
}
|
||||
// default
|
||||
default:
|
||||
unreadable:
|
||||
#ifdef GBA_LOGGING
|
||||
if(systemVerbose & VERBOSE_ILLEGAL_READ) {
|
||||
log("Illegal byte read: %08x at %08x\n", address, armMode ?
|
||||
armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
#endif
|
||||
if(cpuDmaHack) {
|
||||
return cpuDmaLast & 0xFF;
|
||||
} else {
|
||||
if(armState) {
|
||||
return CPUReadByteQuick(reg[15].I+(address & 3));
|
||||
} else {
|
||||
return CPUReadByteQuick(reg[15].I+(address & 1));
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void CPUWriteMemory(u32 address, u32 value)
|
||||
{
|
||||
|
||||
#ifdef GBA_LOGGING
|
||||
if(address & 3) {
|
||||
if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
|
||||
log("Unaligned word write: %08x to %08x from %08x\n",
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
switch(address >> 24) {
|
||||
case 0x02:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u32 *)&freezeWorkRAM[address & 0x3FFFC]))
|
||||
cheatsWriteMemory(address & 0x203FFFC,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE32LE(((u32 *)&workRAM[address & 0x3FFFC]), value);
|
||||
break;
|
||||
case 0x03:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u32 *)&freezeInternalRAM[address & 0x7ffc]))
|
||||
cheatsWriteMemory(address & 0x3007FFC,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE32LE(((u32 *)&internalRAM[address & 0x7ffC]), value);
|
||||
break;
|
||||
case 0x04:
|
||||
if(address < 0x4000400) {
|
||||
CPUUpdateRegister((address & 0x3FC), value & 0xFFFF);
|
||||
CPUUpdateRegister((address & 0x3FC) + 2, (value >> 16));
|
||||
} else goto unwritable;
|
||||
break;
|
||||
case 0x05:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u32 *)&freezePRAM[address & 0x3fc]))
|
||||
cheatsWriteMemory(address & 0x70003FC,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE32LE(((u32 *)&paletteRAM[address & 0x3FC]), value);
|
||||
break;
|
||||
case 0x06:
|
||||
address = (address & 0x1fffc);
|
||||
if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
|
||||
return;
|
||||
if ((address & 0x18000) == 0x18000)
|
||||
address &= 0x17fff;
|
||||
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u32 *)&freezeVRAM[address]))
|
||||
cheatsWriteMemory(address + 0x06000000, value);
|
||||
else
|
||||
#endif
|
||||
|
||||
WRITE32LE(((u32 *)&vram[address]), value);
|
||||
break;
|
||||
case 0x07:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u32 *)&freezeOAM[address & 0x3fc]))
|
||||
cheatsWriteMemory(address & 0x70003FC,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE32LE(((u32 *)&oam[address & 0x3fc]), value);
|
||||
break;
|
||||
case 0x0D:
|
||||
if(cpuEEPROMEnabled) {
|
||||
eepromWrite(address, value);
|
||||
break;
|
||||
}
|
||||
goto unwritable;
|
||||
case 0x0E:
|
||||
if((!eepromInUse) | cpuSramEnabled | cpuFlashEnabled) {
|
||||
(*cpuSaveGameFunc)(address, (u8)value);
|
||||
break;
|
||||
}
|
||||
// default
|
||||
default:
|
||||
unwritable:
|
||||
#ifdef GBA_LOGGING
|
||||
if(systemVerbose & VERBOSE_ILLEGAL_WRITE) {
|
||||
log("Illegal word write: %08x to %08x from %08x\n",
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void CPUWriteHalfWord(u32 address, u16 value)
|
||||
{
|
||||
#ifdef GBA_LOGGING
|
||||
if(address & 1) {
|
||||
if(systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
|
||||
log("Unaligned halfword write: %04x to %08x from %08x\n",
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
switch(address >> 24) {
|
||||
case 2:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeWorkRAM[address & 0x3FFFE]))
|
||||
cheatsWriteHalfWord(address & 0x203FFFE,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&workRAM[address & 0x3FFFE]),value);
|
||||
break;
|
||||
case 3:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeInternalRAM[address & 0x7ffe]))
|
||||
cheatsWriteHalfWord(address & 0x3007ffe,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&internalRAM[address & 0x7ffe]), value);
|
||||
break;
|
||||
case 4:
|
||||
if(address < 0x4000400)
|
||||
CPUUpdateRegister(address & 0x3fe, value);
|
||||
else goto unwritable;
|
||||
break;
|
||||
case 5:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezePRAM[address & 0x03fe]))
|
||||
cheatsWriteHalfWord(address & 0x70003fe,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&paletteRAM[address & 0x3fe]), value);
|
||||
break;
|
||||
case 6:
|
||||
address = (address & 0x1fffe);
|
||||
if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
|
||||
return;
|
||||
if ((address & 0x18000) == 0x18000)
|
||||
address &= 0x17fff;
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeVRAM[address]))
|
||||
cheatsWriteHalfWord(address + 0x06000000,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&vram[address]), value);
|
||||
break;
|
||||
case 7:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(*((u16 *)&freezeOAM[address & 0x03fe]))
|
||||
cheatsWriteHalfWord(address & 0x70003fe,
|
||||
value);
|
||||
else
|
||||
#endif
|
||||
WRITE16LE(((u16 *)&oam[address & 0x3fe]), value);
|
||||
break;
|
||||
case 8:
|
||||
case 9:
|
||||
if(address == 0x80000c4 || address == 0x80000c6 || address == 0x80000c8) {
|
||||
if(!rtcWrite(address, value))
|
||||
goto unwritable;
|
||||
} else if(!agbPrintWrite(address, value)) goto unwritable;
|
||||
break;
|
||||
case 13:
|
||||
if(cpuEEPROMEnabled) {
|
||||
eepromWrite(address, (u8)value);
|
||||
break;
|
||||
}
|
||||
goto unwritable;
|
||||
case 14:
|
||||
if((!eepromInUse) | cpuSramEnabled | cpuFlashEnabled) {
|
||||
(*cpuSaveGameFunc)(address, (u8)value);
|
||||
break;
|
||||
}
|
||||
goto unwritable;
|
||||
default:
|
||||
unwritable:
|
||||
#ifdef GBA_LOGGING
|
||||
if(systemVerbose & VERBOSE_ILLEGAL_WRITE) {
|
||||
log("Illegal halfword write: %04x to %08x from %08x\n",
|
||||
value,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC - 2);
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void CPUWriteByte(u32 address, u8 b)
|
||||
{
|
||||
switch(address >> 24) {
|
||||
case 2:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(freezeWorkRAM[address & 0x3FFFF])
|
||||
cheatsWriteByte(address & 0x203FFFF, b);
|
||||
else
|
||||
#endif
|
||||
workRAM[address & 0x3FFFF] = b;
|
||||
break;
|
||||
case 3:
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(freezeInternalRAM[address & 0x7fff])
|
||||
cheatsWriteByte(address & 0x3007fff, b);
|
||||
else
|
||||
#endif
|
||||
internalRAM[address & 0x7fff] = b;
|
||||
break;
|
||||
case 4:
|
||||
if(address < 0x4000400) {
|
||||
switch(address & 0x3FF) {
|
||||
case 0x60:
|
||||
case 0x61:
|
||||
case 0x62:
|
||||
case 0x63:
|
||||
case 0x64:
|
||||
case 0x65:
|
||||
case 0x68:
|
||||
case 0x69:
|
||||
case 0x6c:
|
||||
case 0x6d:
|
||||
case 0x70:
|
||||
case 0x71:
|
||||
case 0x72:
|
||||
case 0x73:
|
||||
case 0x74:
|
||||
case 0x75:
|
||||
case 0x78:
|
||||
case 0x79:
|
||||
case 0x7c:
|
||||
case 0x7d:
|
||||
case 0x80:
|
||||
case 0x81:
|
||||
case 0x84:
|
||||
case 0x85:
|
||||
case 0x90:
|
||||
case 0x91:
|
||||
case 0x92:
|
||||
case 0x93:
|
||||
case 0x94:
|
||||
case 0x95:
|
||||
case 0x96:
|
||||
case 0x97:
|
||||
case 0x98:
|
||||
case 0x99:
|
||||
case 0x9a:
|
||||
case 0x9b:
|
||||
case 0x9c:
|
||||
case 0x9d:
|
||||
case 0x9e:
|
||||
case 0x9f:
|
||||
soundEvent(address&0xFF, b);
|
||||
break;
|
||||
case 0x301: // HALTCNT, undocumented
|
||||
if(b == 0x80)
|
||||
stopState = true;
|
||||
holdState = 1;
|
||||
holdType = -1;
|
||||
cpuNextEvent = cpuTotalTicks;
|
||||
break;
|
||||
default: // every other register
|
||||
u32 lowerBits = address & 0x3fe;
|
||||
if(address & 1) {
|
||||
CPUUpdateRegister(lowerBits, (READ16LE(&ioMem[lowerBits]) & 0x00FF) | (b << 8));
|
||||
} else {
|
||||
CPUUpdateRegister(lowerBits, (READ16LE(&ioMem[lowerBits]) & 0xFF00) | b);
|
||||
}
|
||||
}
|
||||
break;
|
||||
} else goto unwritable;
|
||||
break;
|
||||
case 5:
|
||||
// no need to switch
|
||||
*((u16 *)&paletteRAM[address & 0x3FE]) = (b << 8) | b;
|
||||
break;
|
||||
case 6:
|
||||
address = (address & 0x1fffe);
|
||||
if (((DISPCNT & 7) >2) && ((address & 0x1C000) == 0x18000))
|
||||
return;
|
||||
if ((address & 0x18000) == 0x18000)
|
||||
address &= 0x17fff;
|
||||
|
||||
// no need to switch
|
||||
// byte writes to OBJ VRAM are ignored
|
||||
if ((address) < objTilesAddress[((DISPCNT&7)+1)>>2])
|
||||
{
|
||||
#ifdef BKPT_SUPPORT
|
||||
if(freezeVRAM[address])
|
||||
cheatsWriteByte(address + 0x06000000, b);
|
||||
else
|
||||
#endif
|
||||
*((u16 *)&vram[address]) = (b << 8) | b;
|
||||
}
|
||||
break;
|
||||
case 7:
|
||||
// no need to switch
|
||||
// byte writes to OAM are ignored
|
||||
// *((u16 *)&oam[address & 0x3FE]) = (b << 8) | b;
|
||||
break;
|
||||
case 13:
|
||||
if(cpuEEPROMEnabled) {
|
||||
eepromWrite(address, b);
|
||||
break;
|
||||
}
|
||||
goto unwritable;
|
||||
case 14:
|
||||
if ((saveType != 5) && ((!eepromInUse) | cpuSramEnabled | cpuFlashEnabled)) {
|
||||
|
||||
//if(!cpuEEPROMEnabled && (cpuSramEnabled | cpuFlashEnabled)) {
|
||||
|
||||
(*cpuSaveGameFunc)(address, b);
|
||||
break;
|
||||
}
|
||||
// default
|
||||
default:
|
||||
unwritable:
|
||||
#ifdef GBA_LOGGING
|
||||
if(systemVerbose & VERBOSE_ILLEGAL_WRITE) {
|
||||
log("Illegal byte write: %02x to %08x from %08x\n",
|
||||
b,
|
||||
address,
|
||||
armMode ? armNextPC - 4 : armNextPC -2 );
|
||||
}
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif // GBAINLINE_H
|
|
@ -0,0 +1,208 @@
|
|||
#include "../System.h"
|
||||
#include "GBA.h"
|
||||
#include "Globals.h"
|
||||
#include "../common/Port.h"
|
||||
#include "../Util.h"
|
||||
#include "../NLS.h"
|
||||
|
||||
#include <time.h>
|
||||
#include <memory.h>
|
||||
|
||||
enum RTCSTATE { IDLE, COMMAND, DATA, READDATA };
|
||||
|
||||
typedef struct {
|
||||
u8 byte0;
|
||||
u8 byte1;
|
||||
u8 byte2;
|
||||
u8 command;
|
||||
int dataLen;
|
||||
int bits;
|
||||
RTCSTATE state;
|
||||
u8 data[12];
|
||||
// reserved variables for future
|
||||
u8 reserved[12];
|
||||
bool reserved2;
|
||||
u32 reserved3;
|
||||
} RTCCLOCKDATA;
|
||||
|
||||
static RTCCLOCKDATA rtcClockData;
|
||||
static bool rtcEnabled = false;
|
||||
|
||||
void rtcEnable(bool e)
|
||||
{
|
||||
rtcEnabled = e;
|
||||
}
|
||||
|
||||
bool rtcIsEnabled()
|
||||
{
|
||||
return rtcEnabled;
|
||||
}
|
||||
|
||||
u16 rtcRead(u32 address)
|
||||
{
|
||||
if(rtcEnabled) {
|
||||
switch(address){
|
||||
case 0x80000c8:
|
||||
return rtcClockData.byte2;
|
||||
break;
|
||||
case 0x80000c6:
|
||||
return rtcClockData.byte1;
|
||||
break;
|
||||
case 0x80000c4:
|
||||
return rtcClockData.byte0;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return READ16LE((&rom[address & 0x1FFFFFE]));
|
||||
}
|
||||
|
||||
static u8 toBCD(u8 value)
|
||||
{
|
||||
value = value % 100;
|
||||
int l = value % 10;
|
||||
int h = value / 10;
|
||||
return h * 16 + l;
|
||||
}
|
||||
|
||||
bool rtcWrite(u32 address, u16 value)
|
||||
{
|
||||
if(!rtcEnabled)
|
||||
return false;
|
||||
|
||||
if(address == 0x80000c8) {
|
||||
rtcClockData.byte2 = (u8)value; // enable ?
|
||||
} else if(address == 0x80000c6) {
|
||||
rtcClockData.byte1 = (u8)value; // read/write
|
||||
} else if(address == 0x80000c4) {
|
||||
if(rtcClockData.byte2 & 1) {
|
||||
if(rtcClockData.state == IDLE && rtcClockData.byte0 == 1 && value == 5) {
|
||||
rtcClockData.state = COMMAND;
|
||||
rtcClockData.bits = 0;
|
||||
rtcClockData.command = 0;
|
||||
} else if(!(rtcClockData.byte0 & 1) && (value & 1)) { // bit transfer
|
||||
rtcClockData.byte0 = (u8)value;
|
||||
switch(rtcClockData.state) {
|
||||
case COMMAND:
|
||||
rtcClockData.command |= ((value & 2) >> 1) << (7-rtcClockData.bits);
|
||||
rtcClockData.bits++;
|
||||
if(rtcClockData.bits == 8) {
|
||||
rtcClockData.bits = 0;
|
||||
switch(rtcClockData.command) {
|
||||
case 0x60:
|
||||
// not sure what this command does but it doesn't take parameters
|
||||
// maybe it is a reset or stop
|
||||
rtcClockData.state = IDLE;
|
||||
rtcClockData.bits = 0;
|
||||
break;
|
||||
case 0x62:
|
||||
// this sets the control state but not sure what those values are
|
||||
rtcClockData.state = READDATA;
|
||||
rtcClockData.dataLen = 1;
|
||||
break;
|
||||
case 0x63:
|
||||
rtcClockData.dataLen = 1;
|
||||
rtcClockData.data[0] = 0x40;
|
||||
rtcClockData.state = DATA;
|
||||
break;
|
||||
case 0x64:
|
||||
break;
|
||||
case 0x65:
|
||||
{
|
||||
struct tm *newtime;
|
||||
time_t long_time;
|
||||
|
||||
time( &long_time ); /* Get time as long integer. */
|
||||
newtime = localtime( &long_time ); /* Convert to local time. */
|
||||
|
||||
rtcClockData.dataLen = 7;
|
||||
rtcClockData.data[0] = toBCD(newtime->tm_year);
|
||||
rtcClockData.data[1] = toBCD(newtime->tm_mon+1);
|
||||
rtcClockData.data[2] = toBCD(newtime->tm_mday);
|
||||
rtcClockData.data[3] = toBCD(newtime->tm_wday);
|
||||
rtcClockData.data[4] = toBCD(newtime->tm_hour);
|
||||
rtcClockData.data[5] = toBCD(newtime->tm_min);
|
||||
rtcClockData.data[6] = toBCD(newtime->tm_sec);
|
||||
rtcClockData.state = DATA;
|
||||
}
|
||||
break;
|
||||
case 0x67:
|
||||
{
|
||||
struct tm *newtime;
|
||||
time_t long_time;
|
||||
|
||||
time( &long_time ); /* Get time as long integer. */
|
||||
newtime = localtime( &long_time ); /* Convert to local time. */
|
||||
|
||||
rtcClockData.dataLen = 3;
|
||||
rtcClockData.data[0] = toBCD(newtime->tm_hour);
|
||||
rtcClockData.data[1] = toBCD(newtime->tm_min);
|
||||
rtcClockData.data[2] = toBCD(newtime->tm_sec);
|
||||
rtcClockData.state = DATA;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
systemMessage(0, N_("Unknown RTC command %02x"), rtcClockData.command);
|
||||
rtcClockData.state = IDLE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case DATA:
|
||||
if(rtcClockData.byte1 & 2) {
|
||||
} else {
|
||||
rtcClockData.byte0 = (rtcClockData.byte0 & ~2) |
|
||||
((rtcClockData.data[rtcClockData.bits >> 3] >>
|
||||
(rtcClockData.bits & 7)) & 1)*2;
|
||||
rtcClockData.bits++;
|
||||
if(rtcClockData.bits == 8*rtcClockData.dataLen) {
|
||||
rtcClockData.bits = 0;
|
||||
rtcClockData.state = IDLE;
|
||||
}
|
||||
}
|
||||
break;
|
||||
case READDATA:
|
||||
if(!(rtcClockData.byte1 & 2)) {
|
||||
} else {
|
||||
rtcClockData.data[rtcClockData.bits >> 3] =
|
||||
(rtcClockData.data[rtcClockData.bits >> 3] >> 1) |
|
||||
((value << 6) & 128);
|
||||
rtcClockData.bits++;
|
||||
if(rtcClockData.bits == 8*rtcClockData.dataLen) {
|
||||
rtcClockData.bits = 0;
|
||||
rtcClockData.state = IDLE;
|
||||
}
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
} else
|
||||
rtcClockData.byte0 = (u8)value;
|
||||
}
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
void rtcReset()
|
||||
{
|
||||
memset(&rtcClockData, 0, sizeof(rtcClockData));
|
||||
|
||||
rtcClockData.byte0 = 0;
|
||||
rtcClockData.byte1 = 0;
|
||||
rtcClockData.byte2 = 0;
|
||||
rtcClockData.command = 0;
|
||||
rtcClockData.dataLen = 0;
|
||||
rtcClockData.bits = 0;
|
||||
rtcClockData.state = IDLE;
|
||||
}
|
||||
|
||||
void rtcSaveGame(gzFile gzFile)
|
||||
{
|
||||
utilGzWrite(gzFile, &rtcClockData, sizeof(rtcClockData));
|
||||
}
|
||||
|
||||
void rtcReadGame(gzFile gzFile)
|
||||
{
|
||||
utilGzRead(gzFile, &rtcClockData, sizeof(rtcClockData));
|
||||
}
|
|
@ -0,0 +1,13 @@
|
|||
#ifndef RTC_H
|
||||
#define RTC_H
|
||||
|
||||
u16 rtcRead(u32 address);
|
||||
bool rtcWrite(u32 address, u16 value);
|
||||
void rtcEnable(bool);
|
||||
bool rtcIsEnabled();
|
||||
void rtcReset();
|
||||
|
||||
void rtcReadGame(gzFile gzFile);
|
||||
void rtcSaveGame(gzFile gzFile);
|
||||
|
||||
#endif // RTC_H
|
Loading…
Reference in New Issue