Make the asm code increment lsl/lsr/asr rm by 4 if rm is pc. (ASM now passes the armwrestler MOV opcode test)

git-svn-id: https://svn.code.sf.net/p/vbam/code/trunk@1192 a31d4220-a93d-0410-bf67-fe4944624d44
2013-04-06 09:27:12 +00:00 · 2013-04-06 09:27:12 +00:00 · 544838a5d1
parent f4f7a5597f
commit 544838a5d1
1 changed files with 5 additions and 1 deletions
--- a/src/gba/GBA-arm.cpp
+++ b/src/gba/GBA-arm.cpp
@ -356,7 +356,11 @@ static void count(u32 opcode, int cond_res)
        EMIT2(and, KONST(0x1F), ecx)
 #define VALUE_LOAD_REG \
        EMIT2(and, KONST(0x0F), eax)            \
-        EMIT2(mov, REGREF2(eax,4), eax)         \
+		EMIT2(cmp, KONST(0x0F), eax)			\
+		EMIT2(mov, REGREF2(eax,4), eax)         \
+		EMIT1(jne, LABELREF(3,f))				\
+		EMIT2(add, KONST(4), ax)				\
+		LABEL(3)								\
        EMIT2(movzx, ch, ecx)                   \
        EMIT2(and, KONST(0x0F), ecx)            \
        EMIT2(mov, REGREF2(ecx,4), ecx)