diff --git a/.gitignore b/.gitignore index f2a8f061..c6bbc3ba 100644 --- a/.gitignore +++ b/.gitignore @@ -16,6 +16,7 @@ vcpkg/* *.so *.dll *.exe +.vscode # vim swap files *.sw? diff --git a/src/gba/GBA-arm.cpp b/src/gba/GBA-arm.cpp index 5eb2ba04..a3923957 100644 --- a/src/gba/GBA-arm.cpp +++ b/src/gba/GBA-arm.cpp @@ -1251,7 +1251,7 @@ DEFINE_ALU_INSN_C(1F, 3F, MVNS, YES) clockTicks += 3; \ if (busPrefetchCount == 0) \ busPrefetchCount = ((busPrefetchCount + 1) << clockTicks) - 1; \ - clockTicks += 1 + codeTicksAccess32(armNextPC); + clockTicks += CYCLES + 1 + codeTicksAccess32(armNextPC); #define OP_MUL \ reg[dest].I = reg[mult].I * rs; @@ -2581,8 +2581,7 @@ static INSN_REGPARM void armA00(uint32_t opcode) armNextPC = reg[15].I; reg[15].I += 4; ARM_PREFETCH; - clockTicks = codeTicksAccessSeq32(armNextPC) + 1; - clockTicks = (clockTicks * 2) + codeTicksAccess32(armNextPC) + 1; + clockTicks = (codeTicksAccessSeq32(armNextPC) * 2) + codeTicksAccess32(armNextPC) + 3; busPrefetchCount = 0; } @@ -2595,8 +2594,7 @@ static INSN_REGPARM void armB00(uint32_t opcode) armNextPC = reg[15].I; reg[15].I += 4; ARM_PREFETCH; - clockTicks = codeTicksAccessSeq32(armNextPC) + 1; - clockTicks = (clockTicks * 2) + codeTicksAccess32(armNextPC) + 1; + clockTicks = (codeTicksAccessSeq32(armNextPC) * 2) + codeTicksAccess32(armNextPC) + 3; busPrefetchCount = 0; } @@ -2612,8 +2610,7 @@ static INSN_REGPARM void armE01(uint32_t opcode) // SWI static INSN_REGPARM void armF00(uint32_t opcode) { - clockTicks = codeTicksAccessSeq32(armNextPC) + 1; - clockTicks = (clockTicks * 2) + codeTicksAccess32(armNextPC) + 1; + clockTicks = (codeTicksAccessSeq32(armNextPC) * 2) + codeTicksAccess32(armNextPC) + 3; busPrefetchCount = 0; CPUSoftwareInterrupt(opcode & 0x00FFFFFF); } diff --git a/src/gba/GBA-thumb.cpp b/src/gba/GBA-thumb.cpp index 1b788540..781061e4 100644 --- a/src/gba/GBA-thumb.cpp +++ b/src/gba/GBA-thumb.cpp @@ -1146,9 +1146,9 @@ static INSN_REGPARM void thumb43_1(uint32_t opcode) reg[dest].I = reg[(opcode >> 3) & 7].I * rm; if (((int32_t)rm) < 0) rm = ~rm; - if ((rm & 0xFFFFFF00) == 0) - clockTicks += 0; - else if ((rm & 0xFFFF0000) == 0) + if ((rm & 0xFFFFFF00) == 0) { + // clockTicks += 0; + } else if ((rm & 0xFFFF0000) == 0) clockTicks += 1; else if ((rm & 0xFF000000) == 0) clockTicks += 2; @@ -1594,7 +1594,7 @@ static INSN_REGPARM void thumbBC(uint32_t opcode) POP_REG(64, 6); POP_REG(128, 7); reg[13].I = temp; - clockTicks = 2 + codeTicksAccess16(armNextPC); + clockTicks += 2 + codeTicksAccess16(armNextPC); } // POP {Rlist, PC} @@ -1625,7 +1625,7 @@ static INSN_REGPARM void thumbBD(uint32_t opcode) reg[13].I = temp; THUMB_PREFETCH; busPrefetchCount = 0; - clockTicks += 3 + codeTicksAccess16(armNextPC) + codeTicksAccess16(armNextPC); + clockTicks += 3 + (codeTicksAccess16(armNextPC) * 2); } // Load/store multiple //////////////////////////////////////////////////// @@ -1673,7 +1673,7 @@ static INSN_REGPARM void thumbC0(uint32_t opcode) THUMB_STM_REG(32, 5, regist); THUMB_STM_REG(64, 6, regist); THUMB_STM_REG(128, 7, regist); - clockTicks = 1 + codeTicksAccess16(armNextPC); + clockTicks += 1 + codeTicksAccess16(armNextPC); } // LDM R0~R7!, {Rlist} @@ -1694,7 +1694,7 @@ static INSN_REGPARM void thumbC8(uint32_t opcode) THUMB_LDM_REG(32, 5); THUMB_LDM_REG(64, 6); THUMB_LDM_REG(128, 7); - clockTicks = 2 + codeTicksAccess16(armNextPC); + clockTicks += 2 + codeTicksAccess16(armNextPC); if (!(opcode & (1 << regist))) reg[regist].I = temp; } @@ -1703,7 +1703,7 @@ static INSN_REGPARM void thumbC8(uint32_t opcode) #define THUMB_CONDITIONAL_BRANCH(COND) \ UPDATE_OLDREG; \ clockTicks = codeTicksAccessSeq16(armNextPC) + 1; \ - if (COND) { \ + if ((bool)COND) { \ uint32_t offset = (uint32_t)((int8_t)(opcode & 0xFF)) << 1; \ reg[15].I += offset; \ armNextPC = reg[15].I; \ diff --git a/src/gba/GBAinline.h b/src/gba/GBAinline.h index d9560a3c..a715a8ef 100644 --- a/src/gba/GBAinline.h +++ b/src/gba/GBAinline.h @@ -103,16 +103,17 @@ static inline uint32_t CPUReadMemory(uint32_t address) case 5: value = READ32LE(((uint32_t*)&paletteRAM[address & 0x3fC])); break; - case 6: - address = (address & 0x1fffc); - if (((DISPCNT & 7) > 2) && ((address & 0x1C000) == 0x18000)) { + case 6: { + unsigned addr = (address & 0x1fffc); + if (((DISPCNT & 7) > 2) && ((addr & 0x1C000) == 0x18000)) { value = 0; break; } - if ((address & 0x18000) == 0x18000) - address &= 0x17fff; - value = READ32LE(((uint32_t*)&vram[address])); + if ((addr & 0x18000) == 0x18000) + addr &= 0x17fff; + value = READ32LE(((uint32_t*)&vram[addr])); break; + } case 7: value = READ32LE(((uint32_t*)&oam[address & 0x3FC])); break; @@ -253,16 +254,17 @@ static inline uint32_t CPUReadHalfWord(uint32_t address) case 5: value = READ16LE(((uint16_t*)&paletteRAM[address & 0x3fe])); break; - case 6: - address = (address & 0x1fffe); - if (((DISPCNT & 7) > 2) && ((address & 0x1C000) == 0x18000)) { + case 6: { + unsigned addr = (address & 0x1fffe); + if (((DISPCNT & 7) > 2) && ((addr & 0x1C000) == 0x18000)) { value = 0; break; } - if ((address & 0x18000) == 0x18000) - address &= 0x17fff; - value = READ16LE(((uint16_t*)&vram[address])); + if ((addr & 0x18000) == 0x18000) + addr &= 0x17fff; + value = READ16LE(((uint16_t*)&vram[addr])); break; + } case 7: value = READ16LE(((uint16_t*)&oam[address & 0x3fe])); break; @@ -293,11 +295,10 @@ static inline uint32_t CPUReadHalfWord(uint32_t address) if (cpuDmaHack) { value = cpuDmaLast & 0xFFFF; } else { - if (armState) { - value = CPUReadHalfWordQuick(reg[15].I + (address & 2)); - } else { - value = CPUReadHalfWordQuick(reg[15].I); - } + int param = reg[15].I; + if (armState) + param += (address & 2); + value = CPUReadHalfWordQuick(param); } #ifdef GBA_LOGGING if (systemVerbose & VERBOSE_ILLEGAL_READ) {