GBA:Fix a few memory read/write issues
- Affects both aligned and unaligned in unsigned 8/16/32 and signed 16 reads/writes - Rom out-of-bounds reads - SRAM r/w access - etc
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@ -1506,7 +1506,7 @@ int CPULoadRom(const char* szFile)
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uint16_t* temp = (uint16_t*)(rom + ((romSize + 1) & ~1));
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uint16_t* temp = (uint16_t*)(rom + ((romSize + 1) & ~1));
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int i;
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int i;
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for (i = (romSize + 1) & ~1; i < romSize; i += 2) {
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for (i = (romSize + 1) & ~1; i < SIZE_ROM; i += 2) {
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WRITE16LE(temp, (i >> 1) & 0xFFFF);
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WRITE16LE(temp, (i >> 1) & 0xFFFF);
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temp++;
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temp++;
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}
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}
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@ -1599,7 +1599,7 @@ int CPULoadRomData(const char* data, int size)
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uint16_t* temp = (uint16_t*)(rom + ((romSize + 1) & ~1));
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uint16_t* temp = (uint16_t*)(rom + ((romSize + 1) & ~1));
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int i;
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int i;
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for (i = (romSize + 1) & ~1; i < romSize; i += 2) {
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for (i = (romSize + 1) & ~1; i < SIZE_ROM; i += 2) {
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WRITE16LE(temp, (i >> 1) & 0xFFFF);
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WRITE16LE(temp, (i >> 1) & 0xFFFF);
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temp++;
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temp++;
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}
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}
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@ -57,11 +57,6 @@ static inline uint32_t CPUReadMemory(uint32_t address)
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}
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}
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#endif
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#endif
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uint32_t value = 0;
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uint32_t value = 0;
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uint32_t oldAddress = address;
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if (address & 3) {
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address &= ~0x03;
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}
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switch (address >> 24) {
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switch (address >> 24) {
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case 0:
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case 0:
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@ -149,17 +144,17 @@ static inline uint32_t CPUReadMemory(uint32_t address)
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value = cpuDmaLast;
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value = cpuDmaLast;
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} else {
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} else {
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if (armState) {
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if (armState) {
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return CPUReadMemoryQuick(reg[15].I);
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value = CPUReadMemoryQuick(reg[15].I);
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} else {
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} else {
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return CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;
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value = CPUReadHalfWordQuick(reg[15].I) | CPUReadHalfWordQuick(reg[15].I) << 16;
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}
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}
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}
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}
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break;
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break;
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}
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}
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if (oldAddress & 3) {
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if (address & 3) {
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#ifdef C_CORE
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#ifdef C_CORE
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int shift = (oldAddress & 3) << 3;
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int shift = (address & 3) << 3;
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value = (value >> shift) | (value << (32 - shift));
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value = (value >> shift) | (value << (32 - shift));
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#else
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#else
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#ifdef __GNUC__
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#ifdef __GNUC__
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@ -167,10 +162,10 @@ static inline uint32_t CPUReadMemory(uint32_t address)
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"shl $3 ,%%ecx;"
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"shl $3 ,%%ecx;"
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"ror %%cl, %0"
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"ror %%cl, %0"
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: "=r"(value)
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: "=r"(value)
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: "r"(value), "c"(oldAddress));
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: "r"(value), "c"(address));
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#else
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#else
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__asm {
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__asm {
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mov ecx, oldAddress;
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mov ecx, address;
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and ecx, 3;
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and ecx, 3;
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shl ecx, 3;
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shl ecx, 3;
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ror [dword ptr value], cl;
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ror [dword ptr value], cl;
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@ -180,10 +175,10 @@ static inline uint32_t CPUReadMemory(uint32_t address)
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}
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}
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#ifdef GBA_LOGGING
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#ifdef GBA_LOGGING
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if (oldAddress & 3) {
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if (address & 3) {
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if (systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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if (systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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log("Unaligned word read from: %08x at %08x (%08x)\n",
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log("Unaligned word read from: %08x at %08x (%08x)\n",
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oldAddress,
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address,
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armMode ? armNextPC - 4 : armNextPC - 2,
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armMode ? armNextPC - 4 : armNextPC - 2,
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value);
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value);
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}
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}
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@ -203,12 +198,7 @@ static inline uint32_t CPUReadHalfWord(uint32_t address)
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}
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}
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#endif
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#endif
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uint32_t value;
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uint32_t value = 0;
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uint32_t oldAddress = address;
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if (address & 1) {
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address &= ~0x01;
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}
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switch (address >> 24) {
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switch (address >> 24) {
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case 0:
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case 0:
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@ -217,7 +207,7 @@ static inline uint32_t CPUReadHalfWord(uint32_t address)
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#ifdef GBA_LOGGING
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#ifdef GBA_LOGGING
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if (systemVerbose & VERBOSE_ILLEGAL_READ) {
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if (systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal halfword read from bios: %08x at %08x\n",
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log("Illegal halfword read from bios: %08x at %08x\n",
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oldAddress,
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address,
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armMode ? armNextPC - 4 : armNextPC - 2);
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armMode ? armNextPC - 4 : armNextPC - 2);
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}
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}
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#endif
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#endif
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@ -304,20 +294,20 @@ static inline uint32_t CPUReadHalfWord(uint32_t address)
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#ifdef GBA_LOGGING
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#ifdef GBA_LOGGING
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if (systemVerbose & VERBOSE_ILLEGAL_READ) {
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if (systemVerbose & VERBOSE_ILLEGAL_READ) {
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log("Illegal halfword read: %08x at %08x (%08x)\n",
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log("Illegal halfword read: %08x at %08x (%08x)\n",
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oldAddress,
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address,
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reg[15].I,
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reg[15].I,
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value);
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value);
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}
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}
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#endif
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#endif
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return value;
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break;
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}
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}
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if (oldAddress & 1) {
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if (address & 1) {
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value = (value >> 8) | (value << 24);
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value = (value >> 8) | (value << 24);
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#ifdef GBA_LOGGING
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#ifdef GBA_LOGGING
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if (systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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if (systemVerbose & VERBOSE_UNALIGNED_MEMORY) {
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log("Unaligned halfword read from: %08x at %08x (%08x)\n",
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log("Unaligned halfword read from: %08x at %08x (%08x)\n",
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oldAddress,
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address,
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armMode ? armNextPC - 4 : armNextPC - 2,
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armMode ? armNextPC - 4 : armNextPC - 2,
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value);
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value);
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}
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}
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@ -339,6 +329,7 @@ static inline int16_t CPUReadHalfWordSigned(uint32_t address)
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value);
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value);
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}
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}
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#endif
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#endif
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return (int8_t)value;
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}
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}
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return (int16_t)value;
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return (int16_t)value;
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}
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}
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@ -459,8 +450,6 @@ static inline void CPUWriteMemory(uint32_t address, uint32_t value)
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}
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}
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#endif
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#endif
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address &= 0xFFFFFFFC;
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switch (address >> 24) {
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switch (address >> 24) {
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case 0x02:
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case 0x02:
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#ifdef BKPT_SUPPORT
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#ifdef BKPT_SUPPORT
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@ -565,8 +554,6 @@ static inline void CPUWriteHalfWord(uint32_t address, uint16_t value)
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}
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}
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#endif
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#endif
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address &= 0xFFFFFFFE;
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switch (address >> 24) {
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switch (address >> 24) {
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case 2:
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case 2:
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#ifdef BKPT_SUPPORT
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#ifdef BKPT_SUPPORT
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