mirror of https://git.suyu.dev/suyu/suyu
shader/control_flow: Specify constness on caller lambdas
Update src/video_core/shader/control_flow.cpp Co-Authored-By: Mat M. <mathew1800@gmail.com> Update src/video_core/shader/control_flow.cpp Co-Authored-By: Mat M. <mathew1800@gmail.com> Update src/video_core/shader/control_flow.cpp Co-Authored-By: Mat M. <mathew1800@gmail.com> Update src/video_core/shader/control_flow.cpp Co-Authored-By: Mat M. <mathew1800@gmail.com> Update src/video_core/shader/control_flow.cpp Co-Authored-By: Mat M. <mathew1800@gmail.com> Update src/video_core/shader/control_flow.cpp Co-Authored-By: Mat M. <mathew1800@gmail.com>
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@ -182,12 +182,12 @@ std::optional<std::pair<BufferInfo, u64>> TrackLDC(const CFGRebuildState& state,
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u64 brx_tracked_register) {
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u64 brx_tracked_register) {
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return TrackInstruction<std::pair<BufferInfo, u64>>(
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return TrackInstruction<std::pair<BufferInfo, u64>>(
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state, pos,
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state, pos,
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[brx_tracked_register](auto instr, auto& opcode) {
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[brx_tracked_register](auto instr, const auto& opcode) {
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return opcode.GetId() == OpCode::Id::LD_C &&
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return opcode.GetId() == OpCode::Id::LD_C &&
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instr.gpr0.Value() == brx_tracked_register &&
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instr.gpr0.Value() == brx_tracked_register &&
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instr.ld_c.type.Value() == Tegra::Shader::UniformType::Single;
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instr.ld_c.type.Value() == Tegra::Shader::UniformType::Single;
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},
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},
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[](auto instr, auto& opcode) {
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[](auto instr, const auto& opcode) {
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const BufferInfo info = {static_cast<u32>(instr.cbuf36.index.Value()),
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const BufferInfo info = {static_cast<u32>(instr.cbuf36.index.Value()),
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static_cast<u32>(instr.cbuf36.GetOffset())};
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static_cast<u32>(instr.cbuf36.GetOffset())};
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return std::make_pair(info, instr.gpr8.Value());
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return std::make_pair(info, instr.gpr8.Value());
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@ -197,22 +197,23 @@ std::optional<std::pair<BufferInfo, u64>> TrackLDC(const CFGRebuildState& state,
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std::optional<u64> TrackSHLRegister(const CFGRebuildState& state, u32& pos,
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std::optional<u64> TrackSHLRegister(const CFGRebuildState& state, u32& pos,
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u64 ldc_tracked_register) {
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u64 ldc_tracked_register) {
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return TrackInstruction<u64>(state, pos,
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return TrackInstruction<u64>(state, pos,
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[ldc_tracked_register](auto instr, auto& opcode) {
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[ldc_tracked_register](auto instr, const auto& opcode) {
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return opcode.GetId() == OpCode::Id::SHL_IMM &&
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return opcode.GetId() == OpCode::Id::SHL_IMM &&
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instr.gpr0.Value() == ldc_tracked_register;
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instr.gpr0.Value() == ldc_tracked_register;
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},
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},
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[](auto instr, auto&) { return instr.gpr8.Value(); });
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[](auto instr, const auto&) { return instr.gpr8.Value(); });
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}
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}
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std::optional<u32> TrackIMNMXValue(const CFGRebuildState& state, u32& pos,
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std::optional<u32> TrackIMNMXValue(const CFGRebuildState& state, u32& pos,
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u64 shl_tracked_register) {
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u64 shl_tracked_register) {
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return TrackInstruction<u32>(
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return TrackInstruction<u32>(state, pos,
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state, pos,
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[shl_tracked_register](auto instr, const auto& opcode) {
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[shl_tracked_register](auto instr, auto& opcode) {
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return opcode.GetId() == OpCode::Id::IMNMX_IMM &&
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return opcode.GetId() == OpCode::Id::IMNMX_IMM &&
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instr.gpr0.Value() == shl_tracked_register;
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instr.gpr0.Value() == shl_tracked_register;
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},
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},
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[](auto instr, const auto&) {
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[](auto instr, auto&) { return static_cast<u32>(instr.alu.GetSignedImm20_20() + 1); });
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return static_cast<u32>(instr.alu.GetSignedImm20_20() + 1);
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});
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}
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}
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std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState& state, u32 pos) {
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std::optional<BranchIndirectInfo> TrackBranchIndirectInfo(const CFGRebuildState& state, u32 pos) {
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