mirror of https://git.suyu.dev/suyu/suyu
Remove unneeded newlines, optional Registry in shader params
Addressing feedback from Rodrigo
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f49ffdd648
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fde8102a41
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@ -78,15 +78,14 @@ VKGraphicsPipeline::VKGraphicsPipeline(const VKDevice& device, VKScheduler& sche
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const GraphicsPipelineCacheKey& key,
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vk::Span<VkDescriptorSetLayoutBinding> bindings,
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const SPIRVProgram& program)
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: device{device}, scheduler{scheduler}, hash{key.Hash()}, cache_key{key},
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: device{device}, scheduler{scheduler}, cache_key{key}, hash{cache_key.Hash()},
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descriptor_set_layout{CreateDescriptorSetLayout(bindings)},
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descriptor_allocator{descriptor_pool, *descriptor_set_layout},
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update_descriptor_queue{update_descriptor_queue}, layout{CreatePipelineLayout()},
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descriptor_template{CreateDescriptorUpdateTemplate(program)}, modules{CreateShaderModules(
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program)},
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renderpass{renderpass_cache.GetRenderPass(key.renderpass_params)}, pipeline{CreatePipeline(
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key.renderpass_params,
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program)} {}
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renderpass{renderpass_cache.GetRenderPass(cache_key.renderpass_params)},
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pipeline{CreatePipeline(cache_key.renderpass_params, program)} {}
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VKGraphicsPipeline::~VKGraphicsPipeline() = default;
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@ -94,8 +94,8 @@ private:
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const VKDevice& device;
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VKScheduler& scheduler;
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const GraphicsPipelineCacheKey cache_key;
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const u64 hash;
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GraphicsPipelineCacheKey cache_key;
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vk::DescriptorSetLayout descriptor_set_layout;
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DescriptorAllocator descriptor_allocator;
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@ -298,9 +298,9 @@ VKComputePipeline& VKPipelineCache::GetComputePipeline(const ComputePipelineCach
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}
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void VKPipelineCache::EmplacePipeline(std::unique_ptr<VKGraphicsPipeline> pipeline) {
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system.GPU().ShaderNotify().MarkShaderComplete();
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std::unique_lock lock{pipeline_cache};
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graphics_cache.at(pipeline->GetCacheKey()) = std::move(pipeline);
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system.GPU().ShaderNotify().MarkShaderComplete();
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}
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void VKPipelineCache::OnShaderRemoval(Shader* shader) {
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@ -128,7 +128,7 @@ void AsyncShaders::QueueOpenGLShader(const OpenGL::Device& device,
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.code_b = std::move(code_b),
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.main_offset = main_offset,
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.compiler_settings = compiler_settings,
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.registry = ®istry,
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.registry = registry,
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.cpu_address = cpu_addr,
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};
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std::unique_lock lock(queue_mutex);
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@ -144,7 +144,6 @@ void AsyncShaders::QueueVulkanShader(Vulkan::VKPipelineCache* pp_cache,
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std::vector<VkDescriptorSetLayoutBinding> bindings,
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Vulkan::SPIRVProgram program,
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Vulkan::GraphicsPipelineCacheKey key) {
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WorkerParams params{
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.backend = Backend::Vulkan,
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.pp_cache = pp_cache,
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@ -186,11 +185,10 @@ void AsyncShaders::ShaderCompilerThread(Core::Frontend::GraphicsContext* context
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lock.unlock();
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if (work.backend == Backend::OpenGL || work.backend == Backend::GLASM) {
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VideoCommon::Shader::Registry registry = *work.registry;
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const ShaderIR ir(work.code, work.main_offset, work.compiler_settings, registry);
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const ShaderIR ir(work.code, work.main_offset, work.compiler_settings, *work.registry);
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const auto scope = context->Acquire();
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auto program =
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OpenGL::BuildShader(*work.device, work.shader_type, work.uid, ir, registry);
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OpenGL::BuildShader(*work.device, work.shader_type, work.uid, ir, *work.registry);
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Result result{};
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result.backend = work.backend;
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result.cpu_address = work.cpu_address;
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@ -210,7 +208,6 @@ void AsyncShaders::ShaderCompilerThread(Core::Frontend::GraphicsContext* context
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finished_work.push_back(std::move(result));
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}
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} else if (work.backend == Backend::Vulkan) {
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auto pipeline = std::make_unique<Vulkan::VKGraphicsPipeline>(
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*work.vk_device, *work.scheduler, *work.descriptor_pool,
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*work.update_descriptor_queue, *work.renderpass_cache, work.key, work.bindings,
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@ -55,7 +55,6 @@ public:
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std::vector<u64> code;
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std::vector<u64> code_b;
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Tegra::Engines::ShaderType shader_type;
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std::unique_ptr<Vulkan::VKGraphicsPipeline> pipeline;
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};
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explicit AsyncShaders(Core::Frontend::EmuWindow& emu_window);
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@ -110,7 +109,7 @@ private:
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std::vector<u64> code_b;
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u32 main_offset;
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VideoCommon::Shader::CompilerSettings compiler_settings;
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const VideoCommon::Shader::Registry* registry;
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std::optional<VideoCommon::Shader::Registry> registry;
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VAddr cpu_address;
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// For Vulkan
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