mirror of https://git.suyu.dev/suyu/suyu
Merge pull request #1216 from ogniK5377/ffma-assert
Added FFMA asserts and missing fields
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commit
9c206fe94d
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@ -403,8 +403,11 @@ union Instruction {
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} flow;
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} flow;
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union {
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union {
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BitField<47, 1, u64> cc;
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BitField<48, 1, u64> negate_b;
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BitField<48, 1, u64> negate_b;
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BitField<49, 1, u64> negate_c;
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BitField<49, 1, u64> negate_c;
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BitField<51, 2, u64> tab5980_1;
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BitField<53, 2, u64> tab5980_0;
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} ffma;
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} ffma;
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union {
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union {
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@ -1445,6 +1445,12 @@ private:
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std::string op_b = instr.ffma.negate_b ? "-" : "";
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std::string op_b = instr.ffma.negate_b ? "-" : "";
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std::string op_c = instr.ffma.negate_c ? "-" : "";
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std::string op_c = instr.ffma.negate_c ? "-" : "";
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ASSERT_MSG(instr.ffma.cc == 0, "FFMA cc not implemented");
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ASSERT_MSG(instr.ffma.tab5980_0 == 1, "FFMA tab5980_0({}) not implemented",
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instr.ffma.tab5980_0.Value()); // Seems to be 1 by default based on SMO
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ASSERT_MSG(instr.ffma.tab5980_1 == 0, "FFMA tab5980_1({}) not implemented",
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instr.ffma.tab5980_1.Value());
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switch (opcode->GetId()) {
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switch (opcode->GetId()) {
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case OpCode::Id::FFMA_CR: {
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case OpCode::Id::FFMA_CR: {
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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