mirror of https://git.suyu.dev/suyu/suyu
Merge pull request #1470 from FernandoS27/alpha_testing
Implemented Alpha Test using Shader Emulation
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commit
75d807788c
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@ -643,8 +643,10 @@ public:
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u32 d3d_cull_mode;
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ComparisonOp depth_test_func;
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float alpha_test_ref;
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ComparisonOp alpha_test_func;
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INSERT_PADDING_WORDS(0xB);
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INSERT_PADDING_WORDS(0x9);
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struct {
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u32 separate_alpha;
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@ -570,10 +570,11 @@ void RasterizerOpenGL::DrawArrays() {
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SyncBlendState();
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SyncLogicOpState();
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SyncCullMode();
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SyncAlphaTest();
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SyncScissorTest();
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// Alpha Testing is synced on shaders.
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SyncTransformFeedback();
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SyncPointState();
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CheckAlphaTests();
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// TODO(bunnei): Sync framebuffer_scale uniform here
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// TODO(bunnei): Sync scissorbox uniform(s) here
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@ -1007,17 +1008,6 @@ void RasterizerOpenGL::SyncLogicOpState() {
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state.logic_op.operation = MaxwellToGL::LogicOp(regs.logic_op.operation);
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}
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void RasterizerOpenGL::SyncAlphaTest() {
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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// TODO(Rodrigo): Alpha testing is a legacy OpenGL feature, but it can be
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// implemented with a test+discard in fragment shaders.
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if (regs.alpha_test_enabled != 0) {
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LOG_CRITICAL(Render_OpenGL, "Alpha testing is not implemented");
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UNREACHABLE();
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}
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}
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void RasterizerOpenGL::SyncScissorTest() {
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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@ -1052,4 +1042,15 @@ void RasterizerOpenGL::SyncPointState() {
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state.point.size = regs.point_size == 0 ? 1 : regs.point_size;
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}
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void RasterizerOpenGL::CheckAlphaTests() {
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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if (regs.alpha_test_enabled != 0 && regs.rt_control.count > 1) {
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LOG_CRITICAL(
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Render_OpenGL,
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"Alpha Testing is enabled with Multiple Render Targets, this behavior is undefined.");
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UNREACHABLE();
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}
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}
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} // namespace OpenGL
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@ -162,9 +162,6 @@ private:
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/// Syncs the LogicOp state to match the guest state
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void SyncLogicOpState();
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/// Syncs the alpha test state to match the guest state
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void SyncAlphaTest();
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/// Syncs the scissor test state to match the guest state
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void SyncScissorTest();
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@ -174,6 +171,9 @@ private:
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/// Syncs the point state to match the guest state
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void SyncPointState();
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/// Check asserts for alpha testing.
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void CheckAlphaTests();
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bool has_ARB_direct_state_access = false;
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bool has_ARB_multi_bind = false;
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bool has_ARB_separate_shader_objects = false;
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@ -1266,9 +1266,29 @@ private:
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ASSERT_MSG(header.ps.omap.sample_mask == 0, "Samplemask write is unimplemented");
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shader.AddLine("if (alpha_test[0] != 0) {");
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++shader.scope;
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// We start on the register containing the alpha value in the first RT.
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u32 current_reg = 3;
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for (u32 render_target = 0; render_target < Maxwell3D::Regs::NumRenderTargets;
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++render_target) {
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// TODO(Blinkhawk): verify the behavior of alpha testing on hardware when
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// multiple render targets are used.
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if (header.ps.IsColorComponentOutputEnabled(render_target, 0) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 1) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 2) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 3)) {
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shader.AddLine(fmt::format("if (!AlphaFunc({})) discard;",
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regs.GetRegisterAsFloat(current_reg)));
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current_reg += 4;
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}
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}
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--shader.scope;
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shader.AddLine('}');
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// Write the color outputs using the data in the shader registers, disabled
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// rendertargets/components are skipped in the register assignment.
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u32 current_reg = 0;
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current_reg = 0;
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for (u32 render_target = 0; render_target < Maxwell3D::Regs::NumRenderTargets;
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++render_target) {
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// TODO(Subv): Figure out how dual-source blending is configured in the Switch.
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@ -3516,7 +3536,7 @@ private:
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// Declarations
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std::set<std::string> declr_predicates;
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}; // namespace Decompiler
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}; // namespace OpenGL::GLShader::Decompiler
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std::string GetCommonDeclarations() {
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return fmt::format("#define MAX_CONSTBUFFER_ELEMENTS {}\n",
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@ -29,6 +29,7 @@ layout(std140) uniform vs_config {
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vec4 viewport_flip;
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uvec4 instance_id;
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uvec4 flip_stage;
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uvec4 alpha_test;
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};
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)";
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@ -105,6 +106,7 @@ layout (std140) uniform gs_config {
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vec4 viewport_flip;
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uvec4 instance_id;
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uvec4 flip_stage;
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uvec4 alpha_test;
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};
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void main() {
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@ -142,8 +144,33 @@ layout (std140) uniform fs_config {
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vec4 viewport_flip;
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uvec4 instance_id;
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uvec4 flip_stage;
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uvec4 alpha_test;
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};
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bool AlphaFunc(in float value) {
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float ref = uintBitsToFloat(alpha_test[2]);
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switch (alpha_test[1]) {
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case 1:
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return false;
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case 2:
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return value < ref;
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case 3:
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return value == ref;
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case 4:
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return value <= ref;
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case 5:
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return value > ref;
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case 6:
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return value != ref;
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case 7:
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return value >= ref;
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case 8:
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return true;
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default:
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return false;
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}
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}
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void main() {
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exec_fragment();
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}
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@ -16,6 +16,17 @@ void MaxwellUniformData::SetFromRegs(const Maxwell3D::State::ShaderStageInfo& sh
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viewport_flip[0] = regs.viewport_transform[0].scale_x < 0.0 ? -1.0f : 1.0f;
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viewport_flip[1] = regs.viewport_transform[0].scale_y < 0.0 ? -1.0f : 1.0f;
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u32 func = static_cast<u32>(regs.alpha_test_func);
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// Normalize the gl variants of opCompare to be the same as the normal variants
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u32 op_gl_variant_base = static_cast<u32>(Tegra::Engines::Maxwell3D::Regs::ComparisonOp::Never);
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if (func >= op_gl_variant_base) {
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func = func - op_gl_variant_base + 1U;
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}
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alpha_test.enabled = regs.alpha_test_enabled;
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alpha_test.func = func;
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alpha_test.ref = regs.alpha_test_ref;
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// We only assign the instance to the first component of the vector, the rest is just padding.
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instance_id[0] = state.current_instance;
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@ -22,8 +22,14 @@ struct MaxwellUniformData {
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alignas(16) GLvec4 viewport_flip;
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alignas(16) GLuvec4 instance_id;
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alignas(16) GLuvec4 flip_stage;
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struct alignas(16) {
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GLuint enabled;
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GLuint func;
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GLfloat ref;
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GLuint padding;
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} alpha_test;
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};
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static_assert(sizeof(MaxwellUniformData) == 48, "MaxwellUniformData structure size is incorrect");
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static_assert(sizeof(MaxwellUniformData) == 64, "MaxwellUniformData structure size is incorrect");
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static_assert(sizeof(MaxwellUniformData) < 16384,
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"MaxwellUniformData structure must be less than 16kb as per the OpenGL spec");
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