mirror of https://git.suyu.dev/suyu/suyu
Merge pull request #3663 from ReinUsesLisp/fcmp-rc
shader/arithmetic: Add FCMP_CR variant
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commit
50c0a92db8
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@ -1871,7 +1871,8 @@ public:
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ICMP_R,
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ICMP_CR,
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ICMP_IMM,
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FCMP_R,
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FCMP_RR,
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FCMP_RC,
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MUFU, // Multi-Function Operator
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RRO_C, // Range Reduction Operator
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RRO_R,
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@ -2179,7 +2180,8 @@ private:
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INST("0101110100100---", Id::HSETP2_R, Type::HalfSetPredicate, "HSETP2_R"),
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INST("0111111-0-------", Id::HSETP2_IMM, Type::HalfSetPredicate, "HSETP2_IMM"),
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INST("0101110100011---", Id::HSET2_R, Type::HalfSet, "HSET2_R"),
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INST("010110111010----", Id::FCMP_R, Type::Arithmetic, "FCMP_R"),
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INST("010110111010----", Id::FCMP_RR, Type::Arithmetic, "FCMP_RR"),
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INST("010010111010----", Id::FCMP_RC, Type::Arithmetic, "FCMP_RC"),
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INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"),
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INST("0100110010010---", Id::RRO_C, Type::Arithmetic, "RRO_C"),
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INST("0101110010010---", Id::RRO_R, Type::Arithmetic, "RRO_R"),
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@ -136,7 +136,8 @@ u32 ShaderIR::DecodeArithmetic(NodeBlock& bb, u32 pc) {
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SetRegister(bb, instr.gpr0, value);
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break;
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}
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case OpCode::Id::FCMP_R: {
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case OpCode::Id::FCMP_RR:
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case OpCode::Id::FCMP_RC: {
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UNIMPLEMENTED_IF(instr.fcmp.ftz == 0);
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Node op_c = GetRegister(instr.gpr39);
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Node comp = GetPredicateComparisonFloat(instr.fcmp.cond, std::move(op_c), Immediate(0.0f));
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