mirror of https://git.suyu.dev/suyu/suyu
Merge pull request #246 from Subv/gpu_macro_calls
GPU: Store uploaded GPU macros and keep track of the number of method arguments.
This commit is contained in:
commit
46f9d4b4a3
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@ -24,12 +24,37 @@ namespace Tegra {
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enum class BufferMethods {
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enum class BufferMethods {
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BindObject = 0,
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BindObject = 0,
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SetGraphMacroCode = 0x45,
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SetGraphMacroCodeArg = 0x46,
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SetGraphMacroEntry = 0x47,
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CountBufferMethods = 0x100,
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CountBufferMethods = 0x100,
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};
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};
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void GPU::WriteReg(u32 method, u32 subchannel, u32 value) {
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void GPU::WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params) {
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LOG_WARNING(HW_GPU, "Processing method %08X on subchannel %u value %08X", method, subchannel,
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LOG_WARNING(HW_GPU, "Processing method %08X on subchannel %u value %08X remaining params %u",
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value);
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method, subchannel, value, remaining_params);
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if (method == static_cast<u32>(BufferMethods::SetGraphMacroEntry)) {
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// Prepare to upload a new macro, reset the upload counter.
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LOG_DEBUG(HW_GPU, "Uploading GPU macro %08X", value);
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current_macro_entry = value;
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current_macro_code.clear();
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return;
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}
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if (method == static_cast<u32>(BufferMethods::SetGraphMacroCodeArg)) {
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// Append a new code word to the current macro.
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current_macro_code.push_back(value);
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// There are no more params remaining, submit the code to the 3D engine.
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if (remaining_params == 0) {
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maxwell_3d->SubmitMacroCode(current_macro_entry, std::move(current_macro_code));
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current_macro_entry = InvalidGraphMacroEntry;
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current_macro_code.clear();
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}
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return;
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}
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if (method == static_cast<u32>(BufferMethods::BindObject)) {
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if (method == static_cast<u32>(BufferMethods::BindObject)) {
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// Bind the current subchannel to the desired engine id.
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// Bind the current subchannel to the desired engine id.
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@ -54,7 +79,7 @@ void GPU::WriteReg(u32 method, u32 subchannel, u32 value) {
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fermi_2d->WriteReg(method, value);
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fermi_2d->WriteReg(method, value);
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break;
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break;
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case EngineID::MAXWELL_B:
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case EngineID::MAXWELL_B:
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maxwell_3d->WriteReg(method, value);
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maxwell_3d->WriteReg(method, value, remaining_params);
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break;
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break;
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case EngineID::MAXWELL_COMPUTE_B:
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case EngineID::MAXWELL_COMPUTE_B:
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maxwell_compute->WriteReg(method, value);
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maxwell_compute->WriteReg(method, value);
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@ -64,35 +89,6 @@ void GPU::WriteReg(u32 method, u32 subchannel, u32 value) {
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}
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}
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}
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}
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void GPU::CallMethod(u32 method, u32 subchannel, const std::vector<u32>& parameters) {
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LOG_WARNING(HW_GPU, "Processing method %08X on subchannel %u num params %zu", method,
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subchannel, parameters.size());
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if (method < static_cast<u32>(BufferMethods::CountBufferMethods)) {
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// TODO(Subv): Research and implement these methods.
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LOG_ERROR(HW_GPU, "Special buffer methods other than Bind are not implemented");
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return;
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}
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ASSERT(bound_engines.find(subchannel) != bound_engines.end());
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const EngineID engine = bound_engines[subchannel];
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switch (engine) {
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case EngineID::FERMI_TWOD_A:
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fermi_2d->CallMethod(method, parameters);
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break;
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case EngineID::MAXWELL_B:
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maxwell_3d->CallMethod(method, parameters);
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break;
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case EngineID::MAXWELL_COMPUTE_B:
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maxwell_compute->CallMethod(method, parameters);
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break;
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default:
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UNIMPLEMENTED();
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}
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}
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void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
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void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
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// TODO(Subv): PhysicalToVirtualAddress is a misnomer, it converts a GPU VAddr into an
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// TODO(Subv): PhysicalToVirtualAddress is a misnomer, it converts a GPU VAddr into an
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// application VAddr.
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// application VAddr.
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@ -107,7 +103,8 @@ void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
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case SubmissionMode::Increasing: {
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case SubmissionMode::Increasing: {
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// Increase the method value with each argument.
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// Increase the method value with each argument.
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for (unsigned i = 0; i < header.arg_count; ++i) {
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for (unsigned i = 0; i < header.arg_count; ++i) {
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WriteReg(header.method + i, header.subchannel, Memory::Read32(current_addr));
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WriteReg(header.method + i, header.subchannel, Memory::Read32(current_addr),
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header.arg_count - i - 1);
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current_addr += sizeof(u32);
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current_addr += sizeof(u32);
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}
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}
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break;
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break;
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@ -116,31 +113,31 @@ void GPU::ProcessCommandList(GPUVAddr address, u32 size) {
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case SubmissionMode::NonIncreasing: {
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case SubmissionMode::NonIncreasing: {
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// Use the same method value for all arguments.
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// Use the same method value for all arguments.
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for (unsigned i = 0; i < header.arg_count; ++i) {
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for (unsigned i = 0; i < header.arg_count; ++i) {
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WriteReg(header.method, header.subchannel, Memory::Read32(current_addr));
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WriteReg(header.method, header.subchannel, Memory::Read32(current_addr),
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header.arg_count - i - 1);
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current_addr += sizeof(u32);
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current_addr += sizeof(u32);
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}
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}
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break;
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break;
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}
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}
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case SubmissionMode::IncreaseOnce: {
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case SubmissionMode::IncreaseOnce: {
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ASSERT(header.arg_count.Value() >= 1);
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ASSERT(header.arg_count.Value() >= 1);
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// Use the original method for the first argument and then the next method for all other
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// Use the original method for the first argument and then the next method for all other
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// arguments.
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// arguments.
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WriteReg(header.method, header.subchannel, Memory::Read32(current_addr),
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header.arg_count - 1);
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current_addr += sizeof(u32);
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// Process this command as a method call instead of a register write. Gather
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for (unsigned i = 1; i < header.arg_count; ++i) {
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// all the parameters first and then pass them at once to the CallMethod function.
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WriteReg(header.method + 1, header.subchannel, Memory::Read32(current_addr),
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std::vector<u32> parameters(header.arg_count);
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header.arg_count - i - 1);
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for (unsigned i = 0; i < header.arg_count; ++i) {
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parameters[i] = Memory::Read32(current_addr);
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current_addr += sizeof(u32);
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current_addr += sizeof(u32);
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}
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}
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CallMethod(header.method, header.subchannel, parameters);
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break;
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break;
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}
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}
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case SubmissionMode::Inline: {
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case SubmissionMode::Inline: {
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// The register value is stored in the bits 16-28 as an immediate
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// The register value is stored in the bits 16-28 as an immediate
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WriteReg(header.method, header.subchannel, header.inline_data);
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WriteReg(header.method, header.subchannel, header.inline_data, 0);
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break;
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break;
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}
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}
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default:
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default:
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@ -8,7 +8,6 @@ namespace Tegra {
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namespace Engines {
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namespace Engines {
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void Fermi2D::WriteReg(u32 method, u32 value) {}
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void Fermi2D::WriteReg(u32 method, u32 value) {}
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void Fermi2D::CallMethod(u32 method, const std::vector<u32>& parameters) {}
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} // namespace Engines
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} // namespace Engines
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} // namespace Tegra
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} // namespace Tegra
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@ -4,7 +4,6 @@
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#pragma once
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#pragma once
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#include <vector>
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#include "common/common_types.h"
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#include "common/common_types.h"
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namespace Tegra {
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namespace Tegra {
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@ -17,13 +16,6 @@ public:
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/// Write the value to the register identified by method.
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/// Write the value to the register identified by method.
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void WriteReg(u32 method, u32 value);
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void WriteReg(u32 method, u32 value);
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/**
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* Handles a method call to this engine.
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* @param method Method to call
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* @param parameters Arguments to the method call
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*/
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void CallMethod(u32 method, const std::vector<u32>& parameters);
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};
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};
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} // namespace Engines
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} // namespace Engines
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@ -8,28 +8,68 @@
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namespace Tegra {
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namespace Tegra {
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namespace Engines {
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namespace Engines {
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/// First register id that is actually a Macro call.
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constexpr u32 MacroRegistersStart = 0xE00;
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const std::unordered_map<u32, Maxwell3D::MethodInfo> Maxwell3D::method_handlers = {
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const std::unordered_map<u32, Maxwell3D::MethodInfo> Maxwell3D::method_handlers = {
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{0xE24, {"SetShader", 5, &Maxwell3D::SetShader}},
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{0xE24, {"SetShader", 5, &Maxwell3D::SetShader}},
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};
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};
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Maxwell3D::Maxwell3D(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
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Maxwell3D::Maxwell3D(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
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void Maxwell3D::CallMethod(u32 method, const std::vector<u32>& parameters) {
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void Maxwell3D::SubmitMacroCode(u32 entry, std::vector<u32> code) {
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// TODO(Subv): Write an interpreter for the macros uploaded via registers 0x45 and 0x47
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uploaded_macros[entry * 2 + MacroRegistersStart] = std::move(code);
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auto itr = method_handlers.find(method);
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if (itr == method_handlers.end()) {
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LOG_ERROR(HW_GPU, "Unhandled method call %08X", method);
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return;
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}
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}
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void Maxwell3D::CallMacroMethod(u32 method, const std::vector<u32>& parameters) {
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// TODO(Subv): Write an interpreter for the macros uploaded via registers 0x45 and 0x47
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// The requested macro must have been uploaded already.
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ASSERT_MSG(uploaded_macros.find(method) != uploaded_macros.end(), "Macro %08X was not uploaded",
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method);
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auto itr = method_handlers.find(method);
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ASSERT_MSG(itr != method_handlers.end(), "Unhandled method call %08X", method);
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ASSERT(itr->second.arguments == parameters.size());
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ASSERT(itr->second.arguments == parameters.size());
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(this->*itr->second.handler)(parameters);
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(this->*itr->second.handler)(parameters);
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// Reset the current macro and its parameters.
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executing_macro = 0;
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macro_params.clear();
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}
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}
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void Maxwell3D::WriteReg(u32 method, u32 value) {
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void Maxwell3D::WriteReg(u32 method, u32 value, u32 remaining_params) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid Maxwell3D register, increase the size of the Regs structure");
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"Invalid Maxwell3D register, increase the size of the Regs structure");
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// It is an error to write to a register other than the current macro's ARG register before it
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// has finished execution.
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if (executing_macro != 0) {
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ASSERT(method == executing_macro + 1);
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}
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// Methods after 0xE00 are special, they're actually triggers for some microcode that was
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// uploaded to the GPU during initialization.
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if (method >= MacroRegistersStart) {
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// We're trying to execute a macro
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if (executing_macro == 0) {
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// A macro call must begin by writing the macro method's register, not its argument.
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ASSERT_MSG((method % 2) == 0,
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"Can't start macro execution by writing to the ARGS register");
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executing_macro = method;
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}
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macro_params.push_back(value);
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// Call the macro when there are no more parameters in the command buffer
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if (remaining_params == 0) {
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CallMacroMethod(executing_macro, macro_params);
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}
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return;
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}
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regs.reg_array[method] = value;
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regs.reg_array[method] = value;
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#define MAXWELL3D_REG_INDEX(field_name) (offsetof(Regs, field_name) / sizeof(u32))
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#define MAXWELL3D_REG_INDEX(field_name) (offsetof(Regs, field_name) / sizeof(u32))
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@ -21,14 +21,10 @@ public:
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~Maxwell3D() = default;
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~Maxwell3D() = default;
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/// Write the value to the register identified by method.
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/// Write the value to the register identified by method.
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void WriteReg(u32 method, u32 value);
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void WriteReg(u32 method, u32 value, u32 remaining_params);
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/**
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/// Uploads the code for a GPU macro program associated with the specified entry.
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* Handles a method call to this engine.
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void SubmitMacroCode(u32 entry, std::vector<u32> code);
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* @param method Method to call
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* @param parameters Arguments to the method call
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*/
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void CallMethod(u32 method, const std::vector<u32>& parameters);
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/// Register structure of the Maxwell3D engine.
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/// Register structure of the Maxwell3D engine.
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/// TODO(Subv): This structure will need to be made bigger as more registers are discovered.
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/// TODO(Subv): This structure will need to be made bigger as more registers are discovered.
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@ -166,7 +162,11 @@ public:
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INSERT_PADDING_WORDS(7);
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INSERT_PADDING_WORDS(7);
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} cb_bind[MaxShaderStage];
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} cb_bind[MaxShaderStage];
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INSERT_PADDING_WORDS(0x50A);
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INSERT_PADDING_WORDS(0x56);
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u32 tex_cb_index;
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INSERT_PADDING_WORDS(0x4B3);
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};
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};
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std::array<u32, NUM_REGS> reg_array;
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std::array<u32, NUM_REGS> reg_array;
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};
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};
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@ -201,6 +201,20 @@ public:
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private:
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private:
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MemoryManager& memory_manager;
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MemoryManager& memory_manager;
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std::unordered_map<u32, std::vector<u32>> uploaded_macros;
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/// Macro method that is currently being executed / being fed parameters.
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u32 executing_macro = 0;
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/// Parameters that have been submitted to the macro call so far.
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std::vector<u32> macro_params;
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/**
|
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* Call a macro on this engine.
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* @param method Method to call
|
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* @param parameters Arguments to the method call
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*/
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void CallMacroMethod(u32 method, const std::vector<u32>& parameters);
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/// Handles a write to the QUERY_GET register.
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/// Handles a write to the QUERY_GET register.
|
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void ProcessQueryGet();
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void ProcessQueryGet();
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@ -234,6 +248,7 @@ ASSERT_REG_POSITION(vertex_array_limit[0], 0x7C0);
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ASSERT_REG_POSITION(shader_config[0], 0x800);
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ASSERT_REG_POSITION(shader_config[0], 0x800);
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ASSERT_REG_POSITION(const_buffer, 0x8E0);
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ASSERT_REG_POSITION(const_buffer, 0x8E0);
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ASSERT_REG_POSITION(cb_bind[0], 0x904);
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ASSERT_REG_POSITION(cb_bind[0], 0x904);
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ASSERT_REG_POSITION(tex_cb_index, 0x982);
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#undef ASSERT_REG_POSITION
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#undef ASSERT_REG_POSITION
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@ -8,7 +8,6 @@ namespace Tegra {
|
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namespace Engines {
|
namespace Engines {
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|
|
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void MaxwellCompute::WriteReg(u32 method, u32 value) {}
|
void MaxwellCompute::WriteReg(u32 method, u32 value) {}
|
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void MaxwellCompute::CallMethod(u32 method, const std::vector<u32>& parameters) {}
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|
||||||
|
|
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} // namespace Engines
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} // namespace Engines
|
||||||
} // namespace Tegra
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} // namespace Tegra
|
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|
|
@ -4,7 +4,6 @@
|
||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
|
||||||
#include <vector>
|
|
||||||
#include "common/common_types.h"
|
#include "common/common_types.h"
|
||||||
|
|
||||||
namespace Tegra {
|
namespace Tegra {
|
||||||
|
@ -17,13 +16,6 @@ public:
|
||||||
|
|
||||||
/// Write the value to the register identified by method.
|
/// Write the value to the register identified by method.
|
||||||
void WriteReg(u32 method, u32 value);
|
void WriteReg(u32 method, u32 value);
|
||||||
|
|
||||||
/**
|
|
||||||
* Handles a method call to this engine.
|
|
||||||
* @param method Method to call
|
|
||||||
* @param parameters Arguments to the method call
|
|
||||||
*/
|
|
||||||
void CallMethod(u32 method, const std::vector<u32>& parameters);
|
|
||||||
};
|
};
|
||||||
|
|
||||||
} // namespace Engines
|
} // namespace Engines
|
||||||
|
|
|
@ -6,6 +6,7 @@
|
||||||
|
|
||||||
#include <memory>
|
#include <memory>
|
||||||
#include <unordered_map>
|
#include <unordered_map>
|
||||||
|
#include <vector>
|
||||||
#include "common/common_types.h"
|
#include "common/common_types.h"
|
||||||
#include "video_core/engines/fermi_2d.h"
|
#include "video_core/engines/fermi_2d.h"
|
||||||
#include "video_core/engines/maxwell_3d.h"
|
#include "video_core/engines/maxwell_3d.h"
|
||||||
|
@ -38,11 +39,10 @@ public:
|
||||||
std::unique_ptr<MemoryManager> memory_manager;
|
std::unique_ptr<MemoryManager> memory_manager;
|
||||||
|
|
||||||
private:
|
private:
|
||||||
/// Writes a single register in the engine bound to the specified subchannel
|
static constexpr u32 InvalidGraphMacroEntry = 0xFFFFFFFF;
|
||||||
void WriteReg(u32 method, u32 subchannel, u32 value);
|
|
||||||
|
|
||||||
/// Calls a method in the engine bound to the specified subchannel with the input parameters.
|
/// Writes a single register in the engine bound to the specified subchannel
|
||||||
void CallMethod(u32 method, u32 subchannel, const std::vector<u32>& parameters);
|
void WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params);
|
||||||
|
|
||||||
/// Mapping of command subchannels to their bound engine ids.
|
/// Mapping of command subchannels to their bound engine ids.
|
||||||
std::unordered_map<u32, EngineID> bound_engines;
|
std::unordered_map<u32, EngineID> bound_engines;
|
||||||
|
@ -53,6 +53,11 @@ private:
|
||||||
std::unique_ptr<Engines::Fermi2D> fermi_2d;
|
std::unique_ptr<Engines::Fermi2D> fermi_2d;
|
||||||
/// Compute engine
|
/// Compute engine
|
||||||
std::unique_ptr<Engines::MaxwellCompute> maxwell_compute;
|
std::unique_ptr<Engines::MaxwellCompute> maxwell_compute;
|
||||||
|
|
||||||
|
/// Entry of the macro that is currently being uploaded
|
||||||
|
u32 current_macro_entry = InvalidGraphMacroEntry;
|
||||||
|
/// Code being uploaded for the current macro
|
||||||
|
std::vector<u32> current_macro_code;
|
||||||
};
|
};
|
||||||
|
|
||||||
} // namespace Tegra
|
} // namespace Tegra
|
||||||
|
|
Loading…
Reference in New Issue