mirror of https://git.suyu.dev/suyu/suyu
dyncom: Properly return the value of the user RO thread register
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@ -16,6 +16,7 @@
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <cstring>
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#include <cstring>
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#include "core/mem_map.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armdefs.h"
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#include "core/arm/skyeye_common/armemu.h"
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#include "core/arm/skyeye_common/armemu.h"
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@ -138,8 +139,16 @@ void ARMul_Reset(ARMul_State* state)
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state->Bank = SVCBANK;
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state->Bank = SVCBANK;
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FLUSHPIPE;
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FLUSHPIPE;
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// Reset CP15
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ResetMPCoreCP15Registers(state);
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ResetMPCoreCP15Registers(state);
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// This is separate from the CP15 register reset function, as
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// this isn't an ARM-defined reset value; it's set by the 3DS.
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//
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// TODO: Whenever TLS is implemented, this should contain
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// the address of the 0x200-byte TLS
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state->CP15[CP15(CP15_THREAD_URO)] = Memory::KERNEL_MEMORY_VADDR;
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state->EndCondition = 0;
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state->EndCondition = 0;
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state->ErrorCode = 0;
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state->ErrorCode = 0;
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@ -227,11 +227,8 @@ u32 ReadCP15Register(ARMul_State* cpu, u32 crn, u32 opcode_1, u32 crm, u32 opcod
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if (opcode_2 == 2)
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if (opcode_2 == 2)
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return cpu->CP15[CP15(CP15_THREAD_UPRW)];
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return cpu->CP15[CP15(CP15_THREAD_UPRW)];
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// TODO: Whenever TLS is implemented, this should return
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// "cpu->CP15[CP15(CP15_THREAD_URO)];"
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// which contains the address of the 0x200-byte TLS
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if (opcode_2 == 3)
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if (opcode_2 == 3)
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return Memory::KERNEL_MEMORY_VADDR;
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return cpu->CP15[CP15(CP15_THREAD_URO)];
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}
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}
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if (InAPrivilegedMode(cpu))
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if (InAPrivilegedMode(cpu))
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