mirror of https://github.com/stella-emu/stella.git
366 lines
9.9 KiB
C++
366 lines
9.9 KiB
C++
//============================================================================
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//
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// SSSS tt lll lll
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// SS SS tt ll ll
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// SS tttttt eeee ll ll aaaa
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// SSSS tt ee ee ll ll aa
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// SS tt eeeeee ll ll aaaaa -- "An Atari 2600 VCS Emulator"
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// SS SS tt ee ll ll aa aa
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// SSSS ttt eeeee llll llll aaaaa
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//
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// Copyright (c) 1995-2010 by Bradford W. Mott, Stephen Anthony
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// and the Stella Team
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//
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// See the file "License.txt" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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// $Id$
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//============================================================================
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#include <cassert>
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#include <cstring>
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#include "System.hxx"
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#include "CartE7.hxx"
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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CartridgeE7::CartridgeE7(const uInt8* image, const Settings& settings)
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: Cartridge(settings)
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{
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// Copy the ROM image into my buffer
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memcpy(myImage, image, 16384);
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// This cart can address a 1024 byte bank of RAM @ 0x1000
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// and 256 bytes @ 0x1800
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// However, it may not be addressable all the time (it may be swapped out)
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// so probably most of the time, the area will point to ROM instead
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registerRamArea(0x1000, 1024, 0x400, 0x00); // 1024 bytes RAM @ 0x1000
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registerRamArea(0x1800, 256, 0x100, 0x00); // 256 bytes RAM @ 0x1800
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// Remember startup bank
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myStartBank = 0;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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CartridgeE7::~CartridgeE7()
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{
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeE7::reset()
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{
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// Initialize RAM
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if(mySettings.getBool("ramrandom"))
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for(uInt32 i = 0; i < 2048; ++i)
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myRAM[i] = mySystem->randGenerator().next();
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else
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memset(myRAM, 0, 2048);
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// Install some default banks for the RAM and first segment
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bankRAM(0);
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bank(myStartBank);
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myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeE7::install(System& system)
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{
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mySystem = &system;
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uInt16 shift = mySystem->pageShift();
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uInt16 mask = mySystem->pageMask();
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// Make sure the system we're being installed in has a page size that'll work
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assert(((0x1400 & mask) == 0) && ((0x1800 & mask) == 0) &&
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((0x1900 & mask) == 0) && ((0x1A00 & mask) == 0));
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System::PageAccess access;
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// Set the page accessing methods for the hot spots
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access.directPeekBase = 0;
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access.directPokeBase = 0;
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access.device = this;
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access.type = System::PA_READ;
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for(uInt32 i = (0x1FE0 & ~mask); i < 0x2000; i += (1 << shift))
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mySystem->setPageAccess(i >> shift, access);
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// Setup the second segment to always point to the last ROM slice
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access.directPokeBase = 0;
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access.device = this;
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access.type = System::PA_READ;
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for(uInt32 j = 0x1A00; j < (0x1FE0U & ~mask); j += (1 << shift))
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{
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access.directPeekBase = &myImage[7 * 2048 + (j & 0x07FF)];
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mySystem->setPageAccess(j >> shift, access);
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}
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myCurrentSlice[1] = 7;
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// Install some default banks for the RAM and first segment
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bankRAM(0);
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bank(myStartBank);
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeE7::peek(uInt16 address)
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{
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uInt16 peekAddress = address;
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address &= 0x0FFF;
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// Switch banks if necessary
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if((address >= 0x0FE0) && (address <= 0x0FE7))
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{
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bank(address & 0x0007);
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}
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else if((address >= 0x0FE8) && (address <= 0x0FEB))
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{
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bankRAM(address & 0x0003);
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}
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if((myCurrentSlice[0] == 7) && (address < 0x0400))
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{
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// Reading from the 1K write port @ $1000 triggers an unwanted write
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uInt8 value = mySystem->getDataBusState(0xFF);
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if(bankLocked())
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return value;
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else
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{
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triggerReadFromWritePort(peekAddress);
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return myRAM[address & 0x03FF] = value;
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}
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}
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else if((address >= 0x0800) && (address <= 0x08FF))
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{
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// Reading from the 256B write port @ $1800 triggers an unwanted write
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uInt8 value = mySystem->getDataBusState(0xFF);
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if(bankLocked())
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return value;
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else
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{
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triggerReadFromWritePort(peekAddress);
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return myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)] = value;
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}
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}
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else
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return myImage[(myCurrentSlice[address >> 11] << 11) + (address & 0x07FF)];
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeE7::poke(uInt16 address, uInt8)
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{
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address &= 0x0FFF;
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// Switch banks if necessary
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if((address >= 0x0FE0) && (address <= 0x0FE7))
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{
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bank(address & 0x0007);
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}
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else if((address >= 0x0FE8) && (address <= 0x0FEB))
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{
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bankRAM(address & 0x0003);
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}
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// NOTE: This does not handle writing to RAM, however, this
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// function should never be called for RAM because of the
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// way page accessing has been setup
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return false;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeE7::bankRAM(uInt16 bank)
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{
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if(bankLocked()) return;
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// Remember what bank we're in
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myCurrentRAM = bank;
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uInt16 offset = bank << 8;
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uInt16 shift = mySystem->pageShift();
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// Setup the page access methods for the current bank
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System::PageAccess access;
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// Set the page accessing method for the 256 bytes of RAM writing pages
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access.directPeekBase = 0;
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access.device = this;
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access.type = System::PA_WRITE;
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for(uInt32 j = 0x1800; j < 0x1900; j += (1 << shift))
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{
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access.directPokeBase = &myRAM[1024 + offset + (j & 0x00FF)];
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mySystem->setPageAccess(j >> shift, access);
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}
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// Set the page accessing method for the 256 bytes of RAM reading pages
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access.directPokeBase = 0;
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access.device = this;
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access.type = System::PA_READ;
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for(uInt32 k = 0x1900; k < 0x1A00; k += (1 << shift))
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{
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access.directPeekBase = &myRAM[1024 + offset + (k & 0x00FF)];
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mySystem->setPageAccess(k >> shift, access);
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}
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myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeE7::bank(uInt16 slice)
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{
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if(bankLocked()) return false;
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// Remember what bank we're in
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myCurrentSlice[0] = slice;
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uInt16 offset = slice << 11;
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uInt16 shift = mySystem->pageShift();
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System::PageAccess access;
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// Setup the page access methods for the current bank
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if(slice != 7)
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{
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// Map ROM image into first segment
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access.directPokeBase = 0;
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access.device = this;
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access.type = System::PA_READ;
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for(uInt32 address = 0x1000; address < 0x1800; address += (1 << shift))
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{
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access.directPeekBase = &myImage[offset + (address & 0x07FF)];
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mySystem->setPageAccess(address >> shift, access);
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}
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}
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else
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{
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// Set the page accessing method for the 1K slice of RAM writing pages
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access.directPeekBase = 0;
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access.device = this;
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access.type = System::PA_WRITE;
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for(uInt32 j = 0x1000; j < 0x1400; j += (1 << shift))
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{
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access.directPokeBase = &myRAM[j & 0x03FF];
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mySystem->setPageAccess(j >> shift, access);
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}
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// Set the page accessing method for the 1K slice of RAM reading pages
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access.directPokeBase = 0;
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access.device = this;
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access.type = System::PA_READ;
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for(uInt32 k = 0x1400; k < 0x1800; k += (1 << shift))
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{
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access.directPeekBase = &myRAM[k & 0x03FF];
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mySystem->setPageAccess(k >> shift, access);
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}
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}
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return myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeE7::bank() const
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{
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return myCurrentSlice[0];
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeE7::bankCount() const
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{
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return 8;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeE7::patch(uInt16 address, uInt8 value)
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{
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address = address & 0x0FFF;
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if(address < 0x0800)
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{
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if(myCurrentSlice[0] == 7)
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{
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// Normally, a write to the read port won't do anything
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// However, the patch command is special in that ignores such
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// cart restrictions
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myRAM[address & 0x03FF] = value;
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}
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else
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myImage[(myCurrentSlice[0] << 11) + (address & 0x07FF)] = value;
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}
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else if(address < 0x0900)
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{
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// Normally, a write to the read port won't do anything
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// However, the patch command is special in that ignores such
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// cart restrictions
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myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)] = value;
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}
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else
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myImage[(myCurrentSlice[address >> 11] << 11) + (address & 0x07FF)] = value;
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return myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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const uInt8* CartridgeE7::getImage(int& size) const
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{
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size = 16384;
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return myImage;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeE7::save(Serializer& out) const
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{
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try
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{
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uInt32 i;
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out.putString(name());
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out.putInt(2);
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for(i = 0; i < 2; ++i)
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out.putInt(myCurrentSlice[i]);
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out.putInt(myCurrentRAM);
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// The 2048 bytes of RAM
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out.putInt(2048);
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for(i = 0; i < 2048; ++i)
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out.putByte((char)myRAM[i]);
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}
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catch(const char* msg)
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{
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cerr << "ERROR: CartridgeE7::save" << endl << " " << msg << endl;
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return false;
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}
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return true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeE7::load(Serializer& in)
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{
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try
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{
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if(in.getString() != name())
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return false;
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uInt32 i, limit;
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limit = (uInt32) in.getInt();
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for(i = 0; i < limit; ++i)
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myCurrentSlice[i] = (uInt16) in.getInt();
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myCurrentRAM = (uInt16) in.getInt();
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// The 2048 bytes of RAM
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limit = (uInt32) in.getInt();
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for(i = 0; i < limit; ++i)
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myRAM[i] = (uInt8) in.getByte();
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}
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catch(const char* msg)
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{
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cerr << "ERROR: CartridgeE7::load" << endl << " " << msg << endl;
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return false;
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}
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// Set up the previously used banks for the RAM and segment
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bankRAM(myCurrentRAM);
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bank(myCurrentSlice[0]);
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return true;
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}
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