mirror of https://github.com/stella-emu/stella.git
278 lines
11 KiB
C++
278 lines
11 KiB
C++
//============================================================================
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//
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// SSSS tt lll lll
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// SS SS tt ll ll
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// SS tttttt eeee ll ll aaaa
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// SSSS tt ee ee ll ll aa
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// SS tt eeeeee ll ll aaaaa -- "An Atari 2600 VCS Emulator"
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// SS SS tt ee ll ll aa aa
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// SSSS ttt eeeee llll llll aaaaa
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//
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// Copyright (c) 1995-2019 by Bradford W. Mott, Stephen Anthony
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// and the Stella Team
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//
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// See the file "License.txt" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//============================================================================
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#ifndef CARTRIDGEDASH_HXX
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#define CARTRIDGEDASH_HXX
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class System;
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#include "bspf.hxx"
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#include "Cart.hxx"
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#ifdef DEBUGGER_SUPPORT
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class CartridgeDASHWidget;
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#include "CartDASHWidget.hxx"
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#endif
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/**
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Cartridge class for new tiling engine "Boulder Dash" format games with RAM.
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Kind of a combination of 3F and 3E, with better switchability.
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B.Watson's Cart3E was used as a template for building this implementation.
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The destination bank (0-3) is held in the top bits of the value written to
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$3E (for RAM switching) or $3F (for ROM switching). The low 6 bits give
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the actual bank number (0-63) corresponding to 512 byte blocks for RAM and
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1024 byte blocks for ROM. The maximum size is therefore 32K RAM and 64K ROM.
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D7D6 indicate the bank number (0-3)
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D5D4D3D2D1D0 indicate the actual # (0-63) from the image/ram
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ROM:
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Note: in descriptions $F000 is equivalent to $1000 -- that is, we only deal
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with the low 13 bits of addressing. Stella code uses $1000, I'm used to $F000
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So, mask with top bits clear :) when reading this document.
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In this scheme, the 4K address space is broken into four 1K ROM segments.
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living at 0x1000, 0x1400, 0x1800, 0x1C00 (or, same thing, 0xF000... etc.),
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and four 512 byte RAM segments, living at 0x1000, 0x1200, 0x1400, 0x1600
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with write-mirrors +0x800 of these. The last 1K ROM ($FC00-$FFFF) segment
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in the 6502 address space (ie: $1C00-$1FFF) is initialised to point to the
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FIRST 1K of the ROM image, so the reset vectors must be placed at the
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end of the first 1K in the ROM image. Note, this is DIFFERENT to 3E which
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switches in the UPPER bank and this bank is fixed. This allows variable sized
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ROM without having to detect size. First bank (0) in ROM is the default fixed
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bank mapped to $FC00.
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The system requires the reset vectors to be valid on a reset, so either the
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hardware first switches in the first bank, or the programmer must ensure
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that the reset vector is present in ALL ROM banks which might be switched
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into the last bank area. Currently the latter (programmer onus) is required,
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but it would be nice for the cartridge hardware to auto-switch on reset.
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ROM switching (write of block+bank number to $3F) D7D6 upper 2 bits of bank #
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indicates the destination segment (0-3, corresponding to $F000, $F400, $F800,
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$FC00), and lower 6 bits indicate the 1K bank to switch in. Can handle 64
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x 1K ROM banks (64K total).
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D7 D6 D5D4D3D2D1D0
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0 0 x x x x x x switch a 1K ROM bank xxxxx to $F000
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0 1 switch a 1K ROM bank xxxxx to $F400
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1 0 switch a 1K ROM bank xxxxx to $F800
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1 1 switch a 1K ROM bank xxxxx to $FC00
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RAM switching (write of segment+bank number to $3E) with D7D6 upper 2 bits of
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bank # indicates the destination RAM segment (0-3, corresponding to $F000,
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$F200, $F400, $F600). Note that this allows contiguous 2K of RAM to be
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configured by setting 4 consecutive RAM segments each 512 bytes with
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consecutive addresses. However, as the write address of RAM is +0x800, this
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invalidates ROM access as described below.
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can handle 64 x 512 byte RAM banks (32K total)
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D7 D6 D5D4D3D2D1D0
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0 0 x x x x x x switch a 512 byte RAM bank xxxxx to $F000 with write @ $F800
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0 1 switch a 512 byte RAM bank xxxxx to $F200 with write @ $FA00
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1 0 switch a 512 byte RAM bank xxxxx to $F400 with write @ $FC00
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1 1 switch a 512 byte RAM bank xxxxx to $F600 with write @ $FE00
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It is possible to switch multiple RAM banks and ROM banks together
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For example,
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F000-F1FF RAM bank A (512 byte READ)
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F200-F3FF high 512 bytes of ROM bank previously loaded at F000
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F400 ROM bank 0 (1K)
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F800 RAM bank A (512 byte WRITE)
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FA00-FBFF high 512 bytes of ROM bank previously loaded at F400
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FC00 ROM bank 1
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This example shows 512 bytes of RAM, and 2 1K ROM banks and two 512 byte ROM
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bank halves.
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Switching RAM blocks (D7D6 of $3E) partially invalidates ROM blocks, as below...
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RAM block Invalidates ROM block
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0 0 (lower half), 2 (lower half)
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1 0 (upper half), 2 (upper half)
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2 1 (lower half), 3 (upper half)
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3 1 (upper half), 3 (lower half)
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For example, RAM block 1 uses address $F200-$F3FF and $FA00-$FBFF
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ROM block 0 uses address $F000-$F3FF, and ROM block 2 uses address $F800-$FBFF
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Switching in RAM block 1 makes F200-F3FF ROM inaccessible, however F000-F1FF is
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still readable. So, care must be paid.
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This crazy RAM layout is useful as it allows contiguous RAM to be switched in,
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up to 2K in one sequentially accessible block. This means you CAN have 2K of
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consecutive RAM (don't forget to copy your reset vectors!)
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@author Andrew Davie
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*/
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class CartridgeDASH: public Cartridge
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{
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friend class CartridgeDASHWidget;
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public:
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/**
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Create a new cartridge using the specified image and size
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@param image Pointer to the ROM image
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@param size The size of the ROM image
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@param md5 The md5sum of the ROM image
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@param settings A reference to the various settings (read-only)
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*/
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CartridgeDASH(const ByteBuffer& image, size_t size, const string& md5,
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const Settings& settings);
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virtual ~CartridgeDASH() = default;
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public:
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/** Reset device to its power-on state */
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void reset() override;
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/**
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Install cartridge in the specified system. Invoked by the system
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when the cartridge is attached to it.
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@param system The system the device should install itself in
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*/
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void install(System& system) override;
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/**
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Patch the cartridge ROM.
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@param address The ROM address to patch
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@param value The value to place into the address
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@return Success or failure of the patch operation
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*/
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bool patch(uInt16 address, uInt8 value) override;
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/**
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Access the internal ROM image for this cartridge.
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@param size Set to the size of the internal ROM image data
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@return A pointer to the internal ROM image data
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*/
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const uInt8* getImage(size_t& size) const override;
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/**
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Save the current state of this cart to the given Serializer.
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@param out The Serializer object to use
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@return False on any errors, else true
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*/
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bool save(Serializer& out) const override;
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/**
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Load the current state of this cart from the given Serializer.
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@param in The Serializer object to use
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@return False on any errors, else true
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*/
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bool load(Serializer& in) override;
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/**
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Get a descriptor for the device name (used in error checking).
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@return The name of the object
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*/
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string name() const override { return "CartridgeDASH"; }
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#ifdef DEBUGGER_SUPPORT
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/**
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Get debugger widget responsible for accessing the inner workings
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of the cart.
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*/
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CartDebugWidget* debugWidget(GuiObject* boss, const GUI::Font& lfont,
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const GUI::Font& nfont, int x, int y, int w, int h) override
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{
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return new CartridgeDASHWidget(boss, lfont, nfont, x, y, w, h, *this);
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}
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#endif
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public:
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/**
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Get the byte at the specified address
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@return The byte at the specified address
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*/
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uInt8 peek(uInt16 address) override;
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/**
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Change the byte at the specified address to the given value
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@param address The address where the value should be stored
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@param value The value to be stored at the address
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@return True if the poke changed the device address space, else false
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*/
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bool poke(uInt16 address, uInt8 value) override;
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private:
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bool bankRAM(uInt8 bank); // switch a RAM bank
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bool bankROM(uInt8 bank); // switch a ROM bank
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void bankRAMSlot(uInt16 bank); // switch in a 512b RAM slot (lower or upper 1/2 bank)
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void bankROMSlot(uInt16 bank); // switch in a 512b RAM slot (read or write port)
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void initializeBankState(); // set all banks according to current bankInUse state
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// We have an array that indicates for each of the 8 512 byte areas of the address space, which ROM/RAM
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// bank is used in that area. ROM switches 1K so occupies 2 successive entries for each switch. RAM occupies
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// two as well, one 512 byte for read and one for write. The RAM locations are +0x800 apart, and the ROM
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// are consecutive. This allows us to determine on a read/write exactly where the data is.
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static constexpr uInt16 BANK_UNDEFINED = 0x8000; // bank is undefined and inaccessible
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std::array<uInt16, 8> bankInUse; // bank being used for ROM/RAM (eight 512 byte areas)
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std::array<uInt16, 4> segmentInUse; // set by bank methods, to know which hotspot was accessed
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static constexpr uInt16 BANK_SWITCH_HOTSPOT_RAM = 0x3E; // writes to this address cause bankswitching
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static constexpr uInt16 BANK_SWITCH_HOTSPOT_ROM = 0x3F; // writes to this address cause bankswitching
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static constexpr uInt8 BANK_BITS = 6; // # bits for bank
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static constexpr uInt8 BIT_BANK_MASK = (1 << BANK_BITS) - 1; // mask for those bits
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static constexpr uInt16 BITMASK_LOWERUPPER = 0x100; // flags lower or upper section of bank (1==upper)
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static constexpr uInt16 BITMASK_ROMRAM = 0x200; // flags ROM or RAM bank switching (1==RAM)
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static constexpr uInt16 MAXIMUM_BANK_COUNT = (1 << BANK_BITS);
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static constexpr uInt16 RAM_BANK_TO_POWER = 9; // 2^n = 512
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static constexpr uInt16 RAM_BANK_SIZE = (1 << RAM_BANK_TO_POWER);
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static constexpr uInt16 BITMASK_RAM_BANK = (RAM_BANK_SIZE - 1);
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static constexpr uInt32 RAM_TOTAL_SIZE = MAXIMUM_BANK_COUNT * RAM_BANK_SIZE;
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static constexpr uInt16 ROM_BANK_TO_POWER = 10; // 2^n = 1024
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static constexpr uInt16 ROM_BANK_SIZE = (1 << ROM_BANK_TO_POWER);
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static constexpr uInt16 BITMASK_ROM_BANK = (ROM_BANK_SIZE - 1);
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static constexpr uInt16 ROM_BANK_COUNT = 64;
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static constexpr uInt16 RAM_WRITE_OFFSET = 0x800;
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ByteBuffer myImage; // Pointer to a dynamically allocated ROM image of the cartridge
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size_t mySize; // Size of the ROM image
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std::array<uInt8, RAM_TOTAL_SIZE> myRAM;
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private:
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// Following constructors and assignment operators not supported
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CartridgeDASH() = delete;
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CartridgeDASH(const CartridgeDASH&) = delete;
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CartridgeDASH(CartridgeDASH&&) = delete;
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CartridgeDASH& operator=(const CartridgeDASH&) = delete;
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CartridgeDASH& operator=(CartridgeDASH&&) = delete;
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};
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#endif
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