Commit Graph

7 Commits

Author SHA1 Message Date
stephena 2cc0d60940 First pass at adding 'hints' to each Cart class that its bank has changed.
This is very useful for conditional re-disassembly, since many bankswitch
schemes consist of ROM only, and once disassembled, cannot possibly have
a different disassembly at some later point.  This is mostly done for such
static schemes (2K, 4K, etc), but more work is required for carts with
extended RAM.  Basically, the cart knows best how its been accessed, so
it makes sense to have the hints there.


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1965 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
2010-03-06 18:56:36 +00:00
stephena e0310e8f35 Checking in WIP for Distella integration. Moved the internal text
handling to C++ stringstreams instead of C-style character arrays,
which fixed some segfaults (sprintf is evil).

First pass at tying the number of banks to the disassembly.  The idea
is that the startup bank (which is now identified by the cart) always
starts at address at 0xfffc, while the other banks are defined by the
PC at the first time we enter the debugger.  This is still a WIP,
since there's no actual checking done yet to see if the current PC
is in the current disassembly.

Added 'ctrlcombo' commandline argument, which completely disables
checking for Control-x key combos.  This is useful when playing
2-player games where the 'f', 'r' and 'Control' keys are supposed
to be treated separately.  Previously, pressing Control and 'r' or
'f' processed some other action (change framerate, reload rom, etc).


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1964 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
2010-03-05 22:02:12 +00:00
stephena 28114a8c51 OK, this is the first pass at a huge reorganization of the debugger
classes.  First off, the distella code has been integrated into a
DiStella class.  This code isn't yet tied to the debugger, but it does
at least compile and generate valid output.

The RamDebug class has been replaced by a CartDebug class, which
takes responsibility for the previous RamDebug stuff as well as 
things related to Cart address space (read from write ports,
disassembly, etc).

Fixed E7 bankswitching when reading from the write port in the upper
256byte area.

Fixed 'read from write port functionality' in general for all carts
that supported it previously.  Basically, if _rwport is enabled, the
address is checked to be an actual read (vs. one that's part of a
normal write cycle), *and* it's actually an illegal access (each
cart/bankswitch type now provides a hint to indicate this condition).

Still TODO is clean up the rework, properly integrate DiStella, and
fix labels and defines (which seem to be completely broken).


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1922 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
2010-01-17 16:48:45 +00:00
stephena e234139a3c Updated Stella headers in all files:
The license file is actually named 'License.txt', not 'license'
  The 'Stella Team' has a capital T, not lowercase.


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1921 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
2010-01-10 03:23:32 +00:00
stephena d372671277 Updated copyright dates to 2010.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1920 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
2010-01-10 02:58:28 +00:00
stephena 19f146038d Added more accurate functionality for the _rwport debugger command. It now
properly distinguishes between intermediate reads which are part of writes,
and ordinary reads.  In the former case, only a read which has a different
address than a write is flagged as an error; intermediate reads acting on
the same address as the corresponding write are considered normal, and won't
trigger a break.


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1901 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
2009-11-11 20:53:57 +00:00
stephena 54a5d77542 Added '_rwport' debugger directive, which can be used in conditional
breaks to test whether an illegal read to the write port of cartridge
RAM has occurred.  It can be used as follows:

  breakif {_rwport == 100}   // break if read was done at wport address 100
  breakif {_rwport}  // break if read was done at *any* wport address

This currently works for all extended RAM carts that worked before.
Specifically, 4A50, DPC, AR and possibly several others aren't supported
yet.  More testing is required.

Renamed CartFASC and CartMB to CartFA and CartF0, respectively.  This
naming now matches that used in other emulators.

CartMC now properly handles read from write port, by using random
values instead of just zero.  However, no test ROMs are available for
this scheme, so there may still be issues.


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1896 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
2009-11-08 16:46:10 +00:00