break. First thing to do is update the year. Happy new year to anyone
reading these commit logs.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2833 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
the CPU registers (A/X/Y/PS) on ROM load.
Added 'INTIM Clks' to the debugger I/O tab, showing the number of clocks
before the current INTIM value decreases by 1.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2768 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
systems, but seems to improve issues on slower computers.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2745 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
- Removed 'SKIP' directive, since it wasn't implemented anyway, and
I see no way to implement it
- Add 'aflag' setting to diassembly output, matching usage in Distella.
This is needed for diassembly output, otherwise DASM barfs on the code.
- Fixed several long-standing bugs in Distella disassembly wrt ROW
directives and labeling. Previously, the output you see in the debugger
wasn't completely correct, since it wasn't compiling properly in DASM.
- Illegal opcodes are now shown as .byte directives; this allows the code
to compile in DASM.
- Print 16 bytes per line in .byte directive in external disassembly,
same as Distella.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2665 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
we need to modify what is caught. Ironically enough, this fixes
a bug whereby when certain errors occur, the recovery system
itself would crash, not the issue that actually caused the bug!
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2499 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
now load and play test ROMs, complete with emulation of timing delays
due to slow accesses on real Harmony hardware. Still TODO is the tunes,
DPC+ stuff, which is stubbed out at this point.
Fixed bug in EFSC bankswitching; state files didn't contain extended RAM
information.
Cleaned up the Serializer API, resulting in slightly faster operation
and smaller state files. Because of this, the state file format
has changed for this release (old state files will no longer work).
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2487 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
debugger before it has been initialized.
Tweaked the format auto-detection by also looking at the TIA scanline
at which drawing first occurs.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2359 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
these logs!
Moved TODO and Credits info directly to the webpage, where it will hopefully
be easier to maintain.
Fixed 'crackling' sound when loading a new ROM, introduced with the 3.5
sound restructuring. It looks like stale data was being loaded by the
sound processing callback. As well, moved the computation of certain
division variables from the sound callback to the framerate re-calculator
(where it's recomputed 1/5 of the time or less).
Updated AboutDialog with info about Stella DonationWare status, and active
members of Stella development.
Updated OSX in-app HTML documentation about Stella DonationWare status.
Bumped version # to 3.5.1_svn, and the process starts again.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2318 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
for these opcodes.
The 'data source' in the debugger CPU area now also shows the SP register,
since it's used for TSX and TXS.
Bumped version # for another test release.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2177 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
tired of doing it manually every time it changes.
Tweaked the handling of JSR, RTI and RTS commands, so they don't erroneously
mark associated addresses as CODE when in fact they're never actually
executed.
Several parts of the Distella code were marking areas as DATA, even though
it depending on knowing the values for the X and Y registers (which it
doesn't, as it's a static analysis). As such, these areas are now marked
as ROW instead, since that's as precise as a static analysis can do. The
processing blocks are left there, though, in case Distella is improved in
a future release.
All the above changes allow for better disassembly with less
'false positives' (ie, areas marked as CODE or DATA when they really aren't).
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2172 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
detection and marking of those areas into the TIA class itself, specifically
at the location of the write. In other words, there's no longer an IF
statement executed for every STx opcode; the marking is done directly
within the write to GRPx or PFx, so extra code is only executed when
actually storing to those locations.
Fixed several cases of opcodes marking an area as CODE when it should have
been DATA.
Added output to the CPU area of the debugger for displaying the source
address for loading data into the A/X/Y registers. Note that these are
only modified when actual addresses are used, so immediate and zero-page
mode will show addresses as zero (meaning that no address was involved
in retrieving the data).
Tweaked console font to better diffentiate the disassembly output between
graphics for players and graphics for the playfield.
Bumped state file format because of changes to M6502. This means old
state files will be broken.
Bumped version # for next test release.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2157 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
previously defined GFX directive is now used for player graphics
only). The 6502 core tracks each of these separately, which provides
for more accurate disassembly.
Modified debugger font and disassembler to show GFX and PGFX with
special characters, instead of using 'X' as Distella does. This also
allows gives much more informative disassembled outout.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2156 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
the various header files. Basically, I'm following advice from
Effective C++, and including only what's absolutely necessary. For
definitions that don't need to be included, the designation 'class xxx'
is used instead. This could potentially lead to faster compile times.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2155 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
currently done by remembering the addresses accessed on execution of
LDA/LDX/LDY, and marking them as GFX during a zero-page STA/STX/STY.
This is obviously as WIP and required much more testing, but I'm
pleasantly surprised by how useful it is so far.
Bumped version # for AtariAge test release.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2147 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
used as a peek operand). Still TODO is deal with poke areas, which would
be relevant in carts with extended RAM.
The interaction between the internal tracking and Distella is now much
tighter, in that knowledge gained by Distella is used in the core code,
and vice versa. This allows the best of both worlds, where the internal
tracking finds stuff at runtime (that couldn't be found in a static
analysis), and Distella tracks potential paths (that haven't occurred at
runtime yet).
Added 'type' debugger prompt command, which basically queries an address
for its disassembly type (CODE/GFX/DATA, etc).
Added debugger commands to query the last address used in an operation
for various registers, but they're only stubs at the moment.
Updated the bankswitch schemes to deal with accesses in and around the
hotspot areas. Previously, peek accesses in these areas weren't being
recorded as DATA areas.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2145 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
in general) into the emulation core. For now, this means integrating the
directive names into CartDebug, and having Distella using those same names.
The new directive names were determined by discussion with Omegamatrix on
AtariAge, and are listed in order of decreasing hierarchy:
SKIP (the 'bit' trick to skip over sections of code)
CODE (addresses accessible to the program counter)
GFX (addresses where data is loaded into TIA GRPx registers)
DATA (addresses referenced somewhere in the ROM)
ROW (addresses never referenced at all)
The next TODO item is to have the 6502 core set these values during emulation.
This is currently (crudely) done with a true/false setting in System::peek,
where true corresponds to CODE. This will be extended, so that false
corresponds to DATA. Eventually GFX will also be detected, by watching writes
to the TIA GRPx registers. Still to work out is how to detect SKIP sections.
Anything not marked with one of the above directives will be marked as ROW,
which essentially means ROM space that is never used. This will have the
nice side effect of detecting dead ROM space, potentially leading to space
optimizations.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2143 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
addresses used as part of code execution (ie, from the PC) during emulation.
This gives Distella much more information than can be determined from a
static analysis alone, resulting in an extremely accurate disassembly.
This also allows to generate very accurate debugger .cfg files.
Not all carts have been ported to this new scheme yet, particularly ones
having extended RAM that can be mapped out dynamically.
Note that this new scheme doubles the amount of RAM used for storing ROM
images, so up to 128KB extra will be used. There's also a small runtime
check for each instruction executed. Preliminary testing doesn't show
any slowdowns, but we'll see how it goes.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2138 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
'Stephen Anthony' (aka, me) in addition to Brad Mott as copyright
holders for Stella. I think I've been with the project long
enough now (almost 10 years) to justify being specifically mentioned
above and beyond 'the Stella Team'.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2001 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
classes. First off, the distella code has been integrated into a
DiStella class. This code isn't yet tied to the debugger, but it does
at least compile and generate valid output.
The RamDebug class has been replaced by a CartDebug class, which
takes responsibility for the previous RamDebug stuff as well as
things related to Cart address space (read from write ports,
disassembly, etc).
Fixed E7 bankswitching when reading from the write port in the upper
256byte area.
Fixed 'read from write port functionality' in general for all carts
that supported it previously. Basically, if _rwport is enabled, the
address is checked to be an actual read (vs. one that's part of a
normal write cycle), *and* it's actually an illegal access (each
cart/bankswitch type now provides a hint to indicate this condition).
Still TODO is clean up the rework, properly integrate DiStella, and
fix labels and defines (which seem to be completely broken).
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1922 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
The license file is actually named 'License.txt', not 'license'
The 'Stella Team' has a capital T, not lowercase.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1921 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
will be integrated intp CpuDebug, which will also be merged with distella.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1914 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba