in NTSC.
First pass at disassembly of ZP RAM in the debugger UI. For now, the
entire range is disassembled, with no regard for alignment (so the PC
won't necessarily always line up with the disassembly). Also, changes
to RAM don't yet trigger a re-disassembly.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1867 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
schemes that have multiples areas of RAM. Converted F4SC, F6SC, F8SC,
FASC to this new functionality.
Added ability to modify extended RAM in 3E, CV, E7 and EFSC ROMs.
Note that these ROMs can swap RAM in and out dynamically, so what
you see in the RAM area won't always be RAM.
Updated debugger CpuWidget; decimal and binary values for SP/A/X/Y
are now all shown at the same time (previously the registers had to
share a decimal/binary view).
Updated debugger documentation for recent additions.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1748 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
stephena