as 'const', and return types are closer to the actual type of data
returned.
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when their address space has been modified by poke. Any writes done
inadvertently by reading from the write port are also flagged. This flag
is used by CartDebug to determine if cart address space has changed.
For now, it uses this information to do a complete re-disassembly.
Entire bank changes are signaled by setting myBankChanged to true,
which overrides the page dirty flag and short-circuits testing for it.
Still TODO is add support for 'AR' bankswitching, and fix the patch
method for several schemes.
Added latest DPC+ updates from Spiceware and Batari.
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The license file is actually named 'License.txt', not 'license'
The 'Stella Team' has a capital T, not lowercase.
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class reworking. Serializer class now handles read/write of state from
files as well as in-memory streams. As a result, Deserializer class has
been removed.
Added state rewinding to the debugger. For now, this is limited to 100
levels of undo, with a new state generated each time a step/trace/frame/
scanline advance is performed. The undo level is 'rolling', in that it
remembers the last 100 levels (so you lose the oldest states when you
start adding more than 100). For now, this is tied to the 'Alt-r' key
in the debugger. Still TODO is add a button for it, and clean up some
TIA output issues when rewinding.
Added support for 6K version of Supercharger ROMs (this fixes issues
with the 6K version of Cubis).
Cleaned up the Serializable infrastructure, making sure that all
classes that need to implement it actually do so now.
Fixed issue with editable widgets in the UI, where pressing Enter
on the keypad wasn't actually being registered.
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schemes that have multiples areas of RAM. Converted F4SC, F6SC, F8SC,
FASC to this new functionality.
Added ability to modify extended RAM in 3E, CV, E7 and EFSC ROMs.
Note that these ROMs can swap RAM in and out dynamically, so what
you see in the RAM area won't always be RAM.
Updated debugger CpuWidget; decimal and binary values for SP/A/X/Y
are now all shown at the same time (previously the registers had to
share a decimal/binary view).
Updated debugger documentation for recent additions.
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the debugger RAM UI. A scrollbar is now present, which can scroll
through each 128 byte 'bank'. Labels indicate the current readport,
so you can distinguish between different areas of RAM. For now,
F4SC, F6SC, F8SC, and FASC have been converted, but I'm looking into the
other schemes now.
The RAM UI takes care of all read/write port issues. From the POV of
the UI, the RAM can be treated as zero-page; translation is done
behind the scene. Searching/comparing and change-tracking are also
supported.
The 'ram' command in the debugger prompt now reflects all RAM, and
readport/writeport addresses are shown, making it easier to use the
command withot having to look up the offsets.
Debugger width has been bumped to 1050 pixels wide to accomodate the
new functionality. We'll see how much trouble this causes ...
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