partial fix for issue #537 (RAM writes to read port)

This commit is contained in:
Thomas Jentzsch 2019-09-12 11:08:26 +02:00
parent dceb1da632
commit f0ddb8caa8
7 changed files with 93 additions and 14 deletions

View File

@ -113,9 +113,22 @@ bool Cartridge3E::poke(uInt16 address, uInt8 value)
return mySystem->tia().poke(address, value);
}
else
pokeRAM(myRAM[(address & 0x03FF) + ((myCurrentBank - 256) << 10)], pokeAddress, value);
{
if(address & 0x0400)
{
pokeRAM(myRAM[(address & 0x03FF) + ((myCurrentBank - 256) << 10)], pokeAddress, value);
return true;
}
else
{
// Writing to the read port should be ignored, but (TODO) trigger a break if option enabled
uInt8 dummy;
return true;
pokeRAM(dummy, pokeAddress, value);
return false;
}
}
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

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@ -83,8 +83,19 @@ uInt8 Cartridge4KSC::peek(uInt16 address)
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool Cartridge4KSC::poke(uInt16 address, uInt8 value)
{
pokeRAM(myRAM[address & 0x007F], address, value);
return true;
if(address & 0x080)
{
pokeRAM(myRAM[address & 0x007F], address, value);
return true;
}
else
{
// Writing to the read port should be ignored, but (TODO) trigger a break if option enabled
uInt8 dummy;
pokeRAM(dummy, address, value);
return false;
}
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

View File

@ -98,8 +98,19 @@ bool CartridgeBFSC::poke(uInt16 address, uInt8 value)
return false;
}
pokeRAM(myRAM[address & 0x007F], pokeAddress, value);
return true;
if(address & 0x080)
{
pokeRAM(myRAM[address & 0x007F], pokeAddress, value);
return true;
}
else
{
// Writing to the read port should be ignored, but (TODO) trigger a break if option enabled
uInt8 dummy;
pokeRAM(dummy, pokeAddress, value);
return false;
}
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

View File

@ -98,8 +98,19 @@ bool CartridgeEFSC::poke(uInt16 address, uInt8 value)
return false;
}
pokeRAM(myRAM[address & 0x007F], pokeAddress, value);
return true;
if(address & 0x080)
{
pokeRAM(myRAM[address & 0x007F], pokeAddress, value);
return true;
}
else
{
// Writing to the read port should be ignored, but (TODO) trigger a break if option enabled
uInt8 dummy;
pokeRAM(dummy, pokeAddress, value);
return false;
}
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

View File

@ -98,8 +98,19 @@ bool CartridgeF4SC::poke(uInt16 address, uInt8 value)
return false;
}
pokeRAM(myRAM[address & 0x007F], pokeAddress, value);
return true;
if(address & 0x080)
{
pokeRAM(myRAM[address & 0x007F], pokeAddress, value);
return true;
}
else
{
// Writing to the read port should be ignored, but (TODO) trigger a break if option enabled
uInt8 dummy;
pokeRAM(dummy, pokeAddress, value);
return false;
}
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

View File

@ -138,8 +138,19 @@ bool CartridgeF6SC::poke(uInt16 address, uInt8 value)
break;
}
pokeRAM(myRAM[address & 0x007F], address, value);
return true;
if(address & 0x080)
{
pokeRAM(myRAM[address & 0x007F], address, value);
return true;
}
else
{
// Writing to the read port should be ignored, but (TODO) trigger a break if option enabled
uInt8 dummy;
pokeRAM(dummy, address, value);
return false;
}
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

View File

@ -118,8 +118,19 @@ bool CartridgeF8SC::poke(uInt16 address, uInt8 value)
break;
}
pokeRAM(myRAM[address & 0x007F], address, value);
return true;
if(address & 0x080)
{
pokeRAM(myRAM[address & 0x007F], address, value);
return true;
}
else
{
// Writing to the read port should be ignored, but (TODO) trigger a break if option enabled
uInt8 dummy;
pokeRAM(dummy, address, value);
return false;
}
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -