updated change log and documentation for RWP

This commit is contained in:
thrust26 2018-12-08 10:27:28 +01:00
parent d3b270dea8
commit e34e63571f
3 changed files with 16 additions and 1 deletions

View File

@ -106,6 +106,10 @@
* Added 'Cartridge.StartBank' ROM property, to force a ROM to use a * Added 'Cartridge.StartBank' ROM property, to force a ROM to use a
specific bank for its reset vector. specific bank for its reset vector.
* Improved snapshots when phosphor is enabled
* Added Developer setting, which breaks on reads from write ports
* Added recently released 'Arkyology' prototype ROM to the database. * Added recently released 'Arkyology' prototype ROM to the database.
* Fixed 'Street Racer' and 'Video Olympics' ROMs to use paddles in both * Fixed 'Street Racer' and 'Video Olympics' ROMs to use paddles in both

Binary file not shown.

Before

Width:  |  Height:  |  Size: 7.2 KiB

After

Width:  |  Height:  |  Size: 7.6 KiB

View File

@ -2538,9 +2538,15 @@
<td><pre>-&lt;plr.|dev.&gt;tiadriven &lt;1|0&gt;</pre></td> <td><pre>-&lt;plr.|dev.&gt;tiadriven &lt;1|0&gt;</pre></td>
<td>Set unused TIA pins to be randomly driven high or low on a read/peek. <td>Set unused TIA pins to be randomly driven high or low on a read/peek.
If disabled, use the last databus value for those pins instead.</td> If disabled, use the last databus value for those pins instead.</td>
</tr><tr>
<td><pre>-&lt;plr.|dev.&gt;rwportbreak &lt;1|0&gt;</pre></td>
<td>Since the 2600 has no dedicated R/W line, different addresses are used
for RAM read or write access. If the code reads from such a write address, this causes
an unwanted, semi-random write to that address.
When this option is enabled, such reads interrupt emulation and the debugger is entered.</td>
</tr><tr> </tr><tr>
<td><pre>-&lt;plr.|dev.&gt;thumb.trapfatal &lt;1|0&gt;</pre></td> <td><pre>-&lt;plr.|dev.&gt;thumb.trapfatal &lt;1|0&gt;</pre></td>
<td>The default of true allows the Thumb ARM emulation to <td>When enabled, this allows the Thumb ARM emulation to
throw an exception and enter the debugger on fatal errors. When disabled, such throw an exception and enter the debugger on fatal errors. When disabled, such
fatal errors are simply logged, and emulation continues. Do not use this fatal errors are simply logged, and emulation continues. Do not use this
unless you know exactly what you're doing, as it changes the behaviour as unless you know exactly what you're doing, as it changes the behaviour as
@ -3110,6 +3116,11 @@
<tr><td>Randomize zero-page ...</td><td>When loading a ROM, randomize all RAM content instead of initializing with all zeroes (for 'Console' = 'Atari 2600' only)</td><td>-plr.ramrandom<br/>-dev.ramrandom</td></tr> <tr><td>Randomize zero-page ...</td><td>When loading a ROM, randomize all RAM content instead of initializing with all zeroes (for 'Console' = 'Atari 2600' only)</td><td>-plr.ramrandom<br/>-dev.ramrandom</td></tr>
<tr><td>Randomize CPU</td><td>When loading a ROM, randomize the content of the specified CPU registers</td><td>-plr.cpurandom<br/>-dev.cpurandom</td></tr> <tr><td>Randomize CPU</td><td>When loading a ROM, randomize the content of the specified CPU registers</td><td>-plr.cpurandom<br/>-dev.cpurandom</td></tr>
<tr><td>Drive unused TIA pins ...</td><td>Unused TIA pins are read random instead of the last databus values</td><td>-plr.tiadriven<br/>-dev.tiadriven</td></tr> <tr><td>Drive unused TIA pins ...</td><td>Unused TIA pins are read random instead of the last databus values</td><td>-plr.tiadriven<br/>-dev.tiadriven</td></tr>
<tr>
<td>Break on reads from ...</td>
<td>A read from a write port interrupts emulation and the debugger is entered.</td>
<td><span style="white-space:nowrap">-plr.rwportbreak<br/>-dev.rwportbreak</span></td>
</tr>
<tr> <tr>
<td>Fatal ARM emulation ...</td> <td>Fatal ARM emulation ...</td>
<td>Thumb ARM emulation throws an exception and enters the debugger on fatal errors</td> <td>Thumb ARM emulation throws an exception and enters the debugger on fatal errors</td>