mirror of https://github.com/stella-emu/stella.git
Another fix for the RIOT code. Reading SWCHA also depends on the last
value written if SWACNT as been set to output. git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1477 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
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@ -13,7 +13,7 @@
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// See the file "license" for information on usage and redistribution of
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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//
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// $Id: AtariVox.cxx,v 1.14 2008-04-13 23:43:14 stephena Exp $
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// $Id: AtariVox.cxx,v 1.15 2008-04-17 13:39:14 stephena Exp $
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//============================================================================
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//============================================================================
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#ifdef SPEAKJET_EMULATION
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#ifdef SPEAKJET_EMULATION
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@ -109,7 +109,6 @@ void AtariVox::write(DigitalPin pin, bool value)
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// Pin 3: EEPROM SDA
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// Pin 3: EEPROM SDA
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// output data to the 24LC256 EEPROM using the I2C protocol
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// output data to the 24LC256 EEPROM using the I2C protocol
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case Three:
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case Three:
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// TODO - implement this
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if(DEBUG_ATARIVOX)
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if(DEBUG_ATARIVOX)
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cerr << "AtariVox: value "
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cerr << "AtariVox: value "
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<< value
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<< value
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@ -122,7 +121,6 @@ void AtariVox::write(DigitalPin pin, bool value)
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// Pin 4: EEPROM SCL
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// Pin 4: EEPROM SCL
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// output clock data to the 24LC256 EEPROM using the I2C protocol
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// output clock data to the 24LC256 EEPROM using the I2C protocol
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case Four:
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case Four:
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// TODO - implement this
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if(DEBUG_ATARIVOX)
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if(DEBUG_ATARIVOX)
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cerr << "AtariVox: value "
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cerr << "AtariVox: value "
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<< value
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<< value
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@ -13,7 +13,7 @@
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// See the file "license" for information on usage and redistribution of
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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//
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// $Id: M6532.cxx,v 1.17 2008-04-08 19:17:26 stephena Exp $
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// $Id: M6532.cxx,v 1.18 2008-04-17 13:39:14 stephena Exp $
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//============================================================================
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//============================================================================
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#include <assert.h>
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#include <assert.h>
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@ -55,10 +55,10 @@ void M6532::reset()
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myTimer = 25 + (random.next() % 75);
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myTimer = 25 + (random.next() % 75);
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myIntervalShift = 6;
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myIntervalShift = 6;
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myCyclesWhenTimerSet = 0;
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myCyclesWhenTimerSet = 0;
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myCyclesWhenInterruptReset = 0;
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myTimerReadAfterInterrupt = false;
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myTimerReadAfterInterrupt = false;
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// Zero the I/O registers
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// Zero the I/O registers
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myOutA = 0x00;
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myDDRA = 0x00;
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myDDRA = 0x00;
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myDDRB = 0x00;
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myDDRB = 0x00;
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}
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}
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@ -69,7 +69,6 @@ void M6532::systemCyclesReset()
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// System cycles are being reset to zero so we need to adjust
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// System cycles are being reset to zero so we need to adjust
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// the cycle count we remembered when the timer was last set
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// the cycle count we remembered when the timer was last set
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myCyclesWhenTimerSet -= mySystem->cycles();
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myCyclesWhenTimerSet -= mySystem->cycles();
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myCyclesWhenInterruptReset -= mySystem->cycles();
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}
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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@ -142,7 +141,9 @@ uInt8 M6532::peek(uInt16 addr)
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if(myConsole.controller(Controller::Right).read(Controller::Four))
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if(myConsole.controller(Controller::Right).read(Controller::Four))
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value |= 0x08;
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value |= 0x08;
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return value;
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// Return the input bits set by the controller *and* the
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// output bits set by the last write to SWCHA
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return (value & ~myDDRA) | (myOutA & myDDRA);
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}
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}
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case 0x01: // Port A Data Direction Register
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case 0x01: // Port A Data Direction Register
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@ -176,7 +177,6 @@ uInt8 M6532::peek(uInt16 addr)
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else
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else
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{
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{
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myTimerReadAfterInterrupt = true;
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myTimerReadAfterInterrupt = true;
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myCyclesWhenInterruptReset = mySystem->cycles();
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return timer & 0xff;
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return timer & 0xff;
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}
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}
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}
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}
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@ -213,9 +213,10 @@ void M6532::poke(uInt16 addr, uInt8 value)
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{
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{
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myRAM[addr & 0x007f] = value;
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myRAM[addr & 0x007f] = value;
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}
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}
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else if((addr & 0x07) == 0x00) // Port A I/O Register (Joystick)
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else if((addr & 0x07) == 0x00) // Port A I/O Register (Joystick)
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{
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{
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uInt8 a = value & myDDRA;
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myOutA = value;
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uInt8 a = myOutA & myDDRA;
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myConsole.controller(Controller::Left).write(Controller::One, a & 0x10);
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myConsole.controller(Controller::Left).write(Controller::One, a & 0x10);
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myConsole.controller(Controller::Left).write(Controller::Two, a & 0x20);
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myConsole.controller(Controller::Left).write(Controller::Two, a & 0x20);
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}
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}
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else if((addr & 0x07) == 0x02) // Port B I/O Register (Console switches)
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else if((addr & 0x07) == 0x02) // Port B I/O Register (Console switches)
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{
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{
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return;
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return; // hardwired as read-only
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}
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}
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else if((addr & 0x07) == 0x03) // Port B Data Direction Register
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else if((addr & 0x07) == 0x03) // Port B Data Direction Register
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{
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{
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// myDDRB = value;
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return; // hardwired as read-only
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return;
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}
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}
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else if((addr & 0x17) == 0x14) // Write timer divide by 1
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else if((addr & 0x17) == 0x14) // Write timer divide by 1
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{
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{
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@ -334,8 +334,8 @@ bool M6532::save(Serializer& out) const
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out.putInt(myTimer);
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out.putInt(myTimer);
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out.putInt(myIntervalShift);
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out.putInt(myIntervalShift);
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out.putInt(myCyclesWhenTimerSet);
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out.putInt(myCyclesWhenTimerSet);
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out.putInt(myCyclesWhenInterruptReset);
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out.putBool(myTimerReadAfterInterrupt);
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out.putBool(myTimerReadAfterInterrupt);
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out.putByte((char)myOutA);
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out.putByte((char)myDDRA);
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out.putByte((char)myDDRA);
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out.putByte((char)myDDRB);
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out.putByte((char)myDDRB);
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}
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}
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@ -371,9 +371,9 @@ bool M6532::load(Deserializer& in)
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myTimer = (uInt32) in.getInt();
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myTimer = (uInt32) in.getInt();
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myIntervalShift = (uInt32) in.getInt();
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myIntervalShift = (uInt32) in.getInt();
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myCyclesWhenTimerSet = (uInt32) in.getInt();
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myCyclesWhenTimerSet = (uInt32) in.getInt();
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myCyclesWhenInterruptReset = (uInt32) in.getInt();
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myTimerReadAfterInterrupt = in.getBool();
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myTimerReadAfterInterrupt = in.getBool();
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myOutA = (uInt8) in.getByte();
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myDDRA = (uInt8) in.getByte();
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myDDRA = (uInt8) in.getByte();
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myDDRB = (uInt8) in.getByte();
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myDDRB = (uInt8) in.getByte();
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}
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}
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@ -13,7 +13,7 @@
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// See the file "license" for information on usage and redistribution of
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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//
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// $Id: M6532.hxx,v 1.8 2008-02-19 12:33:05 stephena Exp $
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// $Id: M6532.hxx,v 1.9 2008-04-17 13:39:14 stephena Exp $
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//============================================================================
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//============================================================================
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#ifndef M6532_HXX
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#ifndef M6532_HXX
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@ -31,7 +31,7 @@ class Deserializer;
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RIOT
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RIOT
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@author Bradford W. Mott
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@author Bradford W. Mott
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@version $Id: M6532.hxx,v 1.8 2008-02-19 12:33:05 stephena Exp $
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@version $Id: M6532.hxx,v 1.9 2008-04-17 13:39:14 stephena Exp $
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*/
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*/
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class M6532 : public Device
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class M6532 : public Device
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{
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{
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// Indicates the number of cycles when the timer was last set
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// Indicates the number of cycles when the timer was last set
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Int32 myCyclesWhenTimerSet;
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Int32 myCyclesWhenTimerSet;
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// Indicates when the timer was read after timer interrupt occured
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Int32 myCyclesWhenInterruptReset;
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// Indicates if a read from timer has taken place after interrupt occured
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// Indicates if a read from timer has taken place after interrupt occured
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bool myTimerReadAfterInterrupt;
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bool myTimerReadAfterInterrupt;
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// Last value written to Port A
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uInt8 myOutA;
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// Data Direction Register for Port A
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// Data Direction Register for Port A
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uInt8 myDDRA;
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uInt8 myDDRA;
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@ -13,7 +13,7 @@
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// See the file "license" for information on usage and redistribution of
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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//
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// $Id: MT24LC256.cxx,v 1.3 2008-04-14 01:39:59 stephena Exp $
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// $Id: MT24LC256.cxx,v 1.4 2008-04-17 13:39:14 stephena Exp $
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//============================================================================
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//============================================================================
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#include <cassert>
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#include <cassert>
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool MT24LC256::readSDA()
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bool MT24LC256::readSDA()
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{
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{
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//cerr << "readSDA: <== " << (jpee_mdat && jpee_sdat) << endl;
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return jpee_mdat && jpee_sdat;
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return jpee_mdat && jpee_sdat;
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}
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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int MT24LC256::jpee_logproc(char const *st)
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int MT24LC256::jpee_logproc(char const *st)
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{
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{
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cerr << st << endl;
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// cerr << " " << st << endl;
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return 0;
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return 0;
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}
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}
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// See the file "license" for information on usage and redistribution of
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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//
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// $Id: TIA.cxx,v 1.88 2008-04-13 00:14:38 stephena Exp $
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// $Id: TIA.cxx,v 1.89 2008-04-17 13:39:14 stephena Exp $
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//============================================================================
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//============================================================================
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//#define DEBUG_HMOVE
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#define DEBUG_HMOVE
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#include <cassert>
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#include <cassert>
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#include <cstdlib>
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#include <cstdlib>
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// TODO: Remove the following special hack for Solaris by
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// TODO: Remove the following special hack for Solaris by
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// figuring out what really happens when Reset Missle
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// figuring out what really happens when Reset Missle
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// occurs 9 cycles after an HMOVE (04/11/08).
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// occurs 9 cycles after an HMOVE (04/11/08).
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if(((clock - myLastHMOVEClock) == (9 * 3)) && (hpos == 36))
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else if(((clock - myLastHMOVEClock) == (9 * 3)) && (hpos == 36))
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{
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{
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myPOSM0 = 8;
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myPOSM0 = 8;
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}
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}
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