From d9a207786d8c210fbe141bb7b59c62a317971a8c Mon Sep 17 00:00:00 2001
From: thrust26
a - Set Accumulator to <value> + aud - Mark 'AUD' range in disassembly base - Set default number base to <base> (bin, dec, hex) + bcol - Mark 'BCOL' range in disassembly break - Set/clear breakpoint at <address> and <bank> breakif - Set/clear breakpoint on <condition> breaklabel - Set/clear breakpoint on <address> (no mirrors, all banks) @@ -919,6 +922,7 @@ clearsavestateifs - Clear all savestate points clearwatches - Clear all watches cls - Clear prompt area of text code - Mark 'CODE' range in disassembly + col - Mark 'COL' range in disassembly colortest - Show value xx as TIA color d - Decimal Mode Flag: set (0 or 1), or toggle (no arg) data - Mark 'DATA' range in disassembly @@ -959,6 +963,7 @@ clearsavestateifs - Clear all savestate points n - Negative Flag: set (0 or 1), or toggle (no arg) palette - Show current TIA palette pc - Set Program Counter to address xx + pcol - Mark 'PCOL' range in disassembly pgfx - Mark 'PGFX' range in disassembly print - Evaluate/print expression xx in hex/dec/binary ram - Show ZP RAM, or set address xx to yy1 [yy2 ...] @@ -1217,6 +1222,8 @@ registers. For example, consider the command 'LDA ($80),Y'. The operand of the command resolves to some address, which isn't always easy to determine at first glance. The 'Src Addr' area shows the actual resulting operand/address being used with the given opcode. +The destination address of the last write is shown besides 'Dest'.
+There's not much else to say about the CPU Registers widget: if you know 6502 assembly, it's pretty self-explanatory. If you don't, well, you should learn :)
@@ -1371,21 +1378,78 @@ can use. These are known as 'directives', and partly correspond to configuration options from the standalone Distella program. They are listed in order of decreasing hierarchy:
CODE | Addresses which have appeared in the program counter, or -which tentatively can appear in the program counter. These can be edited in hex. |
GFX | Addresses which contain data stored in the player graphics registers -(GRP0/GRP1). These addresses are shown with a bitmap of the graphics, which -can be edited in either hex or binary. The bitmap is shown as large blocks. |
PGFX | Addresses which contain data stored in the playfield graphics registers -(PF0/PF1/PF2). These addresses are shown with a bitmap of the graphics, which -can be edited in either hex or binary. The bitmap is shown as small dashes. |
DATA | Addresses used as an operand for some opcode. These can be edited -in hex. |
ROW | Addresses not used as any of the above. These are shown up -to 8 per line, and cannot be edited. |
+ CODE + | + Addresses which have appeared in the program counter, or + which tentatively can appear in the program counter. These can be edited in hex. + | +
+ GFX + | + Addresses which contain data stored in the player graphics registers + (GRP0/GRP1). These addresses are shown with a bitmap of the graphics, which + can be edited in either hex or binary. The bitmap is shown as large blocks. + | +
+ PGFX + | + Addresses which contain data stored in the playfield graphics registers + (PF0/PF1/PF2). These addresses are shown with a bitmap of the graphics, which + can be edited in either hex or binary. The bitmap is shown as small dashes. + | +
+ COL + | + Addresses which contain data stored in the player color registers + (COLUP0/COLUP1). These addresses are shown as color constants, which + can be edited in hex. The color constant names are depending on the ROM's TV type. + | +
+ PCOL + | + Addresses which contain data stored in the playfield color register + (COLUPF). These addresses are shown as color constants, which + can be edited in hex. The color constant names are depending on the ROM's TV type. + | +
+ BCOL + | + Addresses which contain data stored in the background color register + (COLUBK). These addresses are shown as color constants, which + can be edited in hex. The color constant names are depending on the ROM's TV type. + | +
+ AUD + | + Addresses which contain data stored in the audio registers + (AUDC0/AUDC1/AUDF0/AUDF1/AUDV0/AUDV1). These can be edited + in hex. + | +
+ DATA + | + Addresses used as an operand for some opcode. These can be edited + in hex. + | +
+ ROW + | + Addresses not used as any of the above. These are shown up + to 8 per line and cannot be edited. + | +
For code sections, the 6502 mnemonic will be UPPERCASE for all standard instructions,
or lowercase for "illegal" 6502 instructions (like "dcp"). If automatic resolving
of code sections has been disabled for any reason, you'll likely see a lot
@@ -1523,12 +1587,12 @@ the RAM in the DPC scheme is not viewable by the 6507, so its addresses start fr
As mentioned in ROM Disassembly, Stella supports the following directives: -CODE/GFX/PGFX/DATA/ROW. While the debugger will try to automatically mark address +CODE, GFX, PGFX, COL, PCOL, BCOL, AUD, DATA, ROW. While the debugger will try to automatically mark address space with the appropriate directive, there are times when it will fail. There are several options in this case:
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