mirror of https://github.com/stella-emu/stella.git
Comment fixes, and modifcation to a single hotspot for banswitching.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2898 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
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@ -33,15 +33,17 @@ class System;
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/**
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Cartridge class for new tiling engine "Boulder Dash" format games with RAM.
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Kind of a combination of 3F and 3E, with better switchability.
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This code is B.Watson's Cart3E modified to new specs by Andrew Davie.
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B.Watson's Cart3E was used as a template for building this implementation.
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Note: because a single bank number is used to define both the destination (0-3)
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Because a single bank number is used to define both the destination (0-3)
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AND the type (ROM/RAM) there are only 5 bits left to indicate the actual bank
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number. This sets the limits of 32K ROM and 16K RAM.
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D7 is that RAM/ROM flag (1=RAM)
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D6D5 indciates the bank number (0-3)
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D4D0 indicate the actual # (0-31) from the image/ram
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D7 RAM/ROM flag (1=RAM)
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D6D5 indicate the bank number (0-3)
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D4D3D2D1D0 indicate the actual # (0-31) from the image/ram
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Hotspot 0x3F is used for bank-switching, with the encoded bank # as above.
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ROM:
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@ -61,40 +63,29 @@ class System;
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into the last bank area. Currently the latter (programmer onus) is required,
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but it would be nice for the cartridge hardware to auto-switch on reset.
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For both ROM (write to 0x3F) and RAM (write to 0x3E) bank switching, the
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top two bits indicate the physical address segment which is being switched,
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and the low 6 bits indicate the bank number, as per the following ...
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ROM switching (write of block+bank number to $3F) D7=0 and D6D5 upper 2 bits of bank #
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indicates the destination segment (0-3, corresponding to $F000, $F400, $F800, $FC00),
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and lower 5 bits indicate the 1K bank to switch in. Can handle 32 x 1K ROM banks (32K total).
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ROM switching (write of block+bank number to $3F) upper 2 bits of bank #
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indicates the destination segment (0-3, corresponding to $F000, $F400,
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$F800, $FC00), and lower 6 bits indicate the 1K bank to switch in. Can
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handle 64 x 1K ROM banks (64K total).
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D7 D6 D5 D4D3D2D1D0
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0 0 0 x x x x x switch a 1K ROM bank xxxxx to $F000
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0 0 1 switch a 1K ROM bank xxxxx to $F400
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0 1 0 switch a 1K ROM bank xxxxx to $F800
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0 1 1 switch a 1K ROM bank xxxxx to $FC00
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BITS ACTION
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D7D6 0xxxxx
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0 0 -- switch a 1K ROM bank 0xxxxx to $F000
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0 1 -- switch a 1K ROM bank 0xxxxx to $F400
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1 0 -- switch 1K ROM bank 0xxxxx to $F800
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1 1 -- switch 1K ROM bank 0xxxxx to $FC00
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RAM switching (write of segment+bank number to $3F) with D7=1 and D6D5 upper 2 bits of bank #
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indicates the destination RAM segment (0-3, corresponding to $F000, $F200, $F400, $F600).
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Note that this allows contiguous 2K of RAM to be configured by setting 4 consecutive RAM segments
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each 512 bytes with consecutive addresses. However, as the write address of RAM is +0x800, this
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invalidates ROM access as described below.
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can handle 32K ROM maximum
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RAM switching (write of segment+bank number to $3E) upper 2 bits of bank #
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indicates the destination RAM segment (0-3, corresponding to $F000, $F200,
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$F400, $F600). Note that this allows contiguous 2K of RAM to be configured
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by setting 4 consecutive RAM segments with consecutive addresses. However,
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as the write address of RAM is +0x800, this invalidates ROM access as
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described below.
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write access uses +$800
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can handle 32 x 512 byte RAM banks (16K total)
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BITS ACTION
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D7D6 1xxxxx
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0 0 -- switch a 512 byte RAM bank xxxxx to $F000 with write @ $F800
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0 1 -- switch a 512 byte RAM bank xxxxx to $F200 with write @ $FA00
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1 0 -- switch a 512 byte RAM bank xxxxx to $F400 with write @ $FC00
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1 1 -- switch a 512 byte RAM bank xxxxx to $F600 with write @ $FE00
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D7 D6 D5 D4D3D2D1D0
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1 0 0 x x x x x switch a 512 byte RAM bank xxxxx to $F000 with write @ $F800
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0 1 switch a 512 byte RAM bank xxxxx to $F200 with write @ $FA00
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1 0 switch a 512 byte RAM bank xxxxx to $F400 with write @ $FC00
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1 1 switch a 512 byte RAM bank xxxxx to $F600 with write @ $FE00
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It is possible to switch multiple RAM banks and ROM banks together
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@ -122,32 +113,14 @@ class System;
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Switching in RAM block 1 makes F200-F3FF ROM inaccessible, however F000-F1FF is
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still readable. So, care must be paid.
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TODO: THe partial reading of ROM blocks switched out by RAM is not yet implemented!!
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This crazy RAM layout is useful as it allows contiguous RAM to be switched in,
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up to 2K in one sequentially accessible block. This means you CAN have 2K of
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consecutive RAM. If you don't detect ROM write area, then you would have NO ROM
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switched in (don't forget to copy your reset vectors!)
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NOTE:
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We could consider the 4A50 method where the cart detects read/writes and we
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use the same address for reading/writing. magic writes. If we could avoid
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the memory doubling for RAM, that would make it easier to code -- use the
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same variables for read/write This would then mean that ROM banks 2,3 would
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never be bothered by RAM. I like this.
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----------------------------------------------------------------------------------------------
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This implementation of DASH bankswitching numbers the ROM banks 0 to 63, and
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the RAM banks 64 to 127. This is done because the public bankswitching
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interface requires us to use one bank number, not one bank number plus the
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knowledge of whether it's RAM or ROM.
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All 32K of potential RAM is available to a game using this class, even though
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real cartridges might not have the full 32K: We have no way to tell how much
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RAM the game expects. This may change in the future (we may add a stella.pro
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property for this), but for now it shouldn't cause any problems.
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(Famous last words...)
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@author A. Davie
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@author Andrew Davie
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*/
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class CartridgeDASH: public Cartridge
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@ -277,7 +250,7 @@ class CartridgeDASH: public Cartridge
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Int16 bankInUse[4]; // bank being used for ROM/RAM (-1 = undefined)
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// RAM contents. RAM banks are 512 bytes, and there are a maximum of 64 of them
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static const uInt16 BANK_SWITCH_HOTSPOT = 0x3F; // writes to this address cause bankswitching
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static const uInt8 BANK_BITS = 5; // # bits for bank
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static const uInt8 BIT_BANK_MASK = (1 << BANK_BITS) - 1; // mask for those bits
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