diff --git a/src/emucore/CartELF.cxx b/src/emucore/CartELF.cxx
index 493c03360..6b8e183dd 100644
--- a/src/emucore/CartELF.cxx
+++ b/src/emucore/CartELF.cxx
@@ -204,15 +204,6 @@ void CartridgeELF::reset()
   myIsBusDriven = false;
   myDriveBusValue = 0;
 
-  myTransactionQueue
-    .reset()
-	  .injectROM(0x00, 0x1ffc)
-	  .injectROM(0x10)
-    .setNextInjectAddress(0x1000);
-
-  myVcsLib.vcsCopyOverblankToRiotRam();
-  myVcsLib.vcsStartOverblank();
-
   std::memset(mySectionStack.get(), 0, STACK_SIZE);
   std::memset(mySectionText.get(), 0, TEXT_SIZE);
   std::memset(mySectionData.get(), 0, DATA_SIZE);
@@ -228,6 +219,17 @@ void CartridgeELF::reset()
   std::memcpy(mySectionTables.get(), LOOKUP_TABLES, sizeof(LOOKUP_TABLES));
 
   myCortexEmu.reset();
+
+  myTransactionQueue
+    .reset()
+	  .injectROM(0x00, 0x1ffc)
+	  .injectROM(0x10)
+    .setNextInjectAddress(0x1000);
+
+  myVcsLib.vcsCopyOverblankToRiotRam();
+  myVcsLib.vcsStartOverblank();
+  myVcsLib.vcsEndOverblank();
+  myVcsLib.vcsNop2n(1024);
 }
 
 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
diff --git a/src/emucore/elf/BusTransactionQueue.cxx b/src/emucore/elf/BusTransactionQueue.cxx
index b7c4082d1..bdbca66ea 100644
--- a/src/emucore/elf/BusTransactionQueue.cxx
+++ b/src/emucore/elf/BusTransactionQueue.cxx
@@ -70,6 +70,11 @@ BusTransactionQueue& BusTransactionQueue::setNextInjectAddress(uInt16 address)
   return *this;
 }
 
+uInt16 BusTransactionQueue::getNextInjectAddress() const
+{
+  return myNextInjectAddress;
+}
+
 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 BusTransactionQueue& BusTransactionQueue::injectROM(uInt8 value)
 {
diff --git a/src/emucore/elf/BusTransactionQueue.hxx b/src/emucore/elf/BusTransactionQueue.hxx
index 567766e1e..0e2c17ab9 100644
--- a/src/emucore/elf/BusTransactionQueue.hxx
+++ b/src/emucore/elf/BusTransactionQueue.hxx
@@ -39,6 +39,8 @@ class BusTransactionQueue {
     BusTransactionQueue& reset();
 
     BusTransactionQueue& setNextInjectAddress(uInt16 address);
+    uInt16 getNextInjectAddress() const;
+
     BusTransactionQueue& injectROM(uInt8 value);
     BusTransactionQueue& injectROM(uInt8 value, uInt16 address);
 
diff --git a/src/emucore/elf/VcsLib.cxx b/src/emucore/elf/VcsLib.cxx
index da4ae09df..e25cdbed4 100644
--- a/src/emucore/elf/VcsLib.cxx
+++ b/src/emucore/elf/VcsLib.cxx
@@ -55,6 +55,24 @@ void VcsLib::vcsStartOverblank()
     .yield(0x0080);
 }
 
+void VcsLib::vcsEndOverblank()
+{
+  myTransactionQueue
+    .injectROM(0x00, 0x1fff)
+    .yield(0x00ac)
+    .setNextInjectAddress(0x1000);
+}
+
+void VcsLib::vcsNop2n(uInt16 n)
+{
+  if (n == 0) return;
+
+  myTransactionQueue.injectROM(0xea);
+  myTransactionQueue.setNextInjectAddress(
+    myTransactionQueue.getNextInjectAddress() + (n - 1)
+  );
+}
+
 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 CortexM0::err_t VcsLib::fetch16(uInt32 address, uInt16& value, uInt8& op, CortexM0& cortex)
 {
@@ -84,7 +102,8 @@ CortexM0::err_t VcsLib::fetch16(uInt32 address, uInt16& value, uInt8& op, Cortex
       FatalEmulationError::raise("unimplemented: vcsNop2");
 
     case ADDR_VCS_NOP2N:
-      FatalEmulationError::raise("unimplemented: vcsNop2n");
+      vcsNop2n(cortex.getRegister(0));
+      return returnFromStub(value, op);
 
     case ADDR_VCS_WRITE5:
       FatalEmulationError::raise("unimplemented: vcsWrite5");
@@ -131,7 +150,8 @@ CortexM0::err_t VcsLib::fetch16(uInt32 address, uInt16& value, uInt8& op, Cortex
       return returnFromStub(value, op);
 
     case ADDR_VCS_END_OVERBLANK:
-      FatalEmulationError::raise("unimplemented: vcsEndOverblank");
+      vcsEndOverblank();
+      return returnFromStub(value, op);
 
     case ADDR_VCS_READ4:
       FatalEmulationError::raise("unimplemented: vcsRead4");
diff --git a/src/emucore/elf/VcsLib.hxx b/src/emucore/elf/VcsLib.hxx
index dbbf2836d..8a712d087 100644
--- a/src/emucore/elf/VcsLib.hxx
+++ b/src/emucore/elf/VcsLib.hxx
@@ -32,6 +32,8 @@ class VcsLib: public CortexM0::BusTransactionDelegate {
     void vcsWrite5(uInt8 zpAddress, uInt8 value);
     void vcsCopyOverblankToRiotRam();
     void vcsStartOverblank();
+    void vcsEndOverblank();
+    void vcsNop2n(uInt16 n);
 
   private:
     CortexM0::err_t returnFromStub(uInt16& value, uInt8& op);