ShuriZma
/
stella
mirror of https://github.com/stella-emu/stella.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

replace some odd decimal numbers with hexadecimals

This commit is contained in:
Thomas Jentzsch 2019-09-17 09:38:47 +02:00
parent 0f0c86de41
commit b00a438608
3 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/emucore/CartCV.hxx
View File

@ -137,16 +137,16 @@ class CartridgeCV : public Cartridge
private: private:
// The 2k ROM image for the cartridge // The 2k ROM image for the cartridge
std::array<uInt8, 2048> myImage; std::array<uInt8, 0x0800> myImage;
// Initial size of the cart data // Initial size of the cart data
size_t mySize; size_t mySize;
// The 1024 bytes of RAM // The 1024 bytes of RAM
std::array<uInt8, 1024> myRAM; std::array<uInt8, 0x0400> myRAM;
// Initial RAM data from the cart (doesn't always exist) // Initial RAM data from the cart (doesn't always exist)
std::array<uInt8, 1024> myInitialRAM; std::array<uInt8, 0x0400> myInitialRAM;
private: private:
// Following constructors and assignment operators not supported // Following constructors and assignment operators not supported

6
src/emucore/CartE0.cxx
View File

@ -60,14 +60,14 @@ void CartridgeE0::install(System& system)
for(uInt16 addr = 0x1C00; addr < (0x1FE0U & ~System::PAGE_MASK); for(uInt16 addr = 0x1C00; addr < (0x1FE0U & ~System::PAGE_MASK);
addr += System::PAGE_SIZE) addr += System::PAGE_SIZE)
{ {
access.directPeekBase = &myImage[7168 + (addr & 0x03FF)]; access.directPeekBase = &myImage[0x1C00 + (addr & 0x03FF)];
access.codeAccessBase = &myCodeAccessBase[7168 + (addr & 0x03FF)]; access.codeAccessBase = &myCodeAccessBase[0x1C00 + (addr & 0x03FF)];
mySystem->setPageAccess(addr, access); mySystem->setPageAccess(addr, access);
} }
// Set the page accessing methods for the hot spots in the last segment // Set the page accessing methods for the hot spots in the last segment
access.directPeekBase = nullptr; access.directPeekBase = nullptr;
access.codeAccessBase = &myCodeAccessBase[8128]; access.codeAccessBase = &myCodeAccessBase[0x1FC0]; // TJ: is this the correct address (or 0x1FE0)?
access.type = System::PageAccessType::READ; access.type = System::PageAccessType::READ;
for(uInt16 addr = (0x1FE0 & ~System::PAGE_MASK); addr < 0x2000; for(uInt16 addr = (0x1FE0 & ~System::PAGE_MASK); addr < 0x2000;
addr += System::PAGE_SIZE) addr += System::PAGE_SIZE)

10
src/emucore/CartMNetwork.cxx
View File

@ -121,7 +121,7 @@ uInt8 CartridgeMNetwork::peek(uInt16 address)
else if((address >= 0x0800) && (address <= 0x08FF)) else if((address >= 0x0800) && (address <= 0x08FF))
{ {
// Reading from the 256B write port @ $1800 triggers an unwanted write // Reading from the 256B write port @ $1800 triggers an unwanted write
return peekRAM(myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)], peekAddress); return peekRAM(myRAM[0x0400 + (myCurrentRAM << 8) + (address & 0x00FF)], peekAddress);
} }
else else
return myImage[(myCurrentSlice[address >> 11] << 11) + (address & (BANK_SIZE - 1))]; return myImage[(myCurrentSlice[address >> 11] << 11) + (address & (BANK_SIZE - 1))];
@ -144,7 +144,7 @@ bool CartridgeMNetwork::poke(uInt16 address, uInt8 value)
} }
else if((address >= 0x0800) && (address <= 0x08FF)) else if((address >= 0x0800) && (address <= 0x08FF))
{ {
pokeRAM(myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)], pokeAddress, value); pokeRAM(myRAM[0x0400 + (myCurrentRAM << 8) + (address & 0x00FF)], pokeAddress, value);
return true; return true;
} }
@ -162,9 +162,9 @@ void CartridgeMNetwork::bankRAM(uInt16 bank)
// Setup the page access methods for the current bank // Setup the page access methods for the current bank
// Set the page accessing method for the 256 bytes of RAM reading pages // Set the page accessing method for the 256 bytes of RAM reading pages
setAccess(0x1800, 0x100, 1024 + offset, myRAM.data(), romSize() + BANK_SIZE / 2, System::PageAccessType::WRITE); setAccess(0x1800, 0x100, 0x0400 + offset, myRAM.data(), romSize() + BANK_SIZE / 2, System::PageAccessType::WRITE);
// Set the page accessing method for the 256 bytes of RAM reading pages // Set the page accessing method for the 256 bytes of RAM reading pages
setAccess(0x1900, 0x100, 1024 + offset, myRAM.data(), romSize() + BANK_SIZE / 2, System::PageAccessType::READ); setAccess(0x1900, 0x100, 0x0400 + offset, myRAM.data(), romSize() + BANK_SIZE / 2, System::PageAccessType::READ);
myBankChanged = true; myBankChanged = true;
} }
@ -223,7 +223,7 @@ bool CartridgeMNetwork::patch(uInt16 address, uInt8 value)
// Normally, a write to the read port won't do anything // Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such // However, the patch command is special in that ignores such
// cart restrictions // cart restrictions
myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)] = value; myRAM[0x0400 + (myCurrentRAM << 8) + (address & 0x00FF)] = value;
} }
else else
myImage[(myCurrentSlice[address >> 11] << 11) + (address & (BANK_SIZE-1))] = value; myImage[(myCurrentSlice[address >> 11] << 11) + (address & (BANK_SIZE-1))] = value;