mirror of https://github.com/stella-emu/stella.git
1st part of Distella improvements
This commit is contained in:
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648ed74527
commit
95b04b2baa
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@ -986,7 +986,7 @@ string CartDebug::saveDisassembly()
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settings.aflag = false; // Otherwise DASM gets confused
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settings.fflag = DiStella::settings.fflag;
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settings.rflag = DiStella::settings.rflag;
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settings.bwidth = 17; // default from Distella
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settings.bwidth = 8+1; // same as Stella debugger
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Disassembly disasm;
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disasm.list.reserve(2048);
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@ -1002,8 +1002,8 @@ string CartDebug::saveDisassembly()
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DiStella distella(*this, disasm.list, info, settings,
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myDisLabels, myDisDirectives, myReserved);
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buf << " SEG CODE\n"
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<< " ORG $" << Base::HEX4 << info.offset << "\n\n";
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buf << " SEG CODE\n"
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<< " ORG $" << Base::HEX4 << info.offset << "\n\n";
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// Format in 'distella' style
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for(uInt32 i = 0; i < disasm.list.size(); ++i)
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@ -1012,55 +1012,53 @@ string CartDebug::saveDisassembly()
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// Add label (if any)
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if(tag.label != "")
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buf << ALIGN(7) << (tag.label+":") << endl;
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buf << " ";
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buf << ALIGN(4) << (tag.label) << "\n";
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buf << " ";
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switch(tag.type)
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{
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case CartDebug::CODE:
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{
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buf << ALIGN(25) << tag.disasm << tag.ccount << "\n";
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break;
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}
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case CartDebug::NONE:
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{
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buf << "\n";
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buf << ALIGN(32) << tag.disasm << tag.ccount.substr(0, 5) << tag.ctotal << tag.ccount.substr(5, 2);
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if (tag.disasm.find("WSYNC") != std::string::npos)
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buf << "\n;---------------------------------------";
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break;
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}
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case CartDebug::ROW:
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{
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buf << tag.disasm << "\n";
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buf << ".byte " << ALIGN(32) << tag.disasm.substr(6, 8*4-1) << "; $" << Base::HEX4 << tag.address << " (*)";
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break;
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}
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case CartDebug::GFX:
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{
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buf << ".byte " << (settings.gfx_format == Base::F_2 ? "%" : "$")
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buf << ".byte " << (settings.gfx_format == Base::F_2 ? "%" : "$")
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<< tag.bytes << " ; |";
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for(int c = 12; c < 20; ++c)
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buf << ((tag.disasm[c] == '\x1e') ? "#" : " ");
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buf << "| $" << Base::HEX4 << tag.address << " (G)\n";
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buf << ALIGN(13) << "|" << "$" << Base::HEX4 << tag.address << " (G)";
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break;
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}
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case CartDebug::PGFX:
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{
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buf << ".byte " << (settings.gfx_format == Base::F_2 ? "%" : "$")
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buf << ".byte " << (settings.gfx_format == Base::F_2 ? "%" : "$")
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<< tag.bytes << " ; |";
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for(int c = 12; c < 20; ++c)
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buf << ((tag.disasm[c] == '\x1f') ? "*" : " ");
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buf << "| $" << Base::HEX4 << tag.address << " (P)\n";
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buf << ALIGN(13) << "|" << "$" << Base::HEX4 << tag.address << " (P)";
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break;
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}
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case CartDebug::DATA:
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{
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buf << tag.disasm.substr(0, 9) << " ; $" << Base::HEX4 << tag.address << " (D)\n";
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{
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buf << ".byte " << ALIGN(32) << tag.disasm.substr(6, 8 * 4 - 1) << "; $" << Base::HEX4 << tag.address << " (D)";
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break;
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}
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case CartDebug::NONE:
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default:
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{
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buf << "\n";
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break;
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}
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}
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}
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} // switch
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buf << "\n";
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}
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}
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@ -1074,10 +1072,11 @@ string CartDebug::saveDisassembly()
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<< "; ROM properties MD5 : " << myConsole.properties().get(Cartridge_MD5) << "\n"
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<< "; Bankswitch type : " << myConsole.cartridge().about() << "\n;\n"
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<< "; Legend: * = CODE not yet run (tentative code)\n"
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<< "; ! = taken branch crosses page\n"
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<< "; D = DATA directive (referenced in some way)\n"
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<< "; G = GFX directive, shown as '#' (stored in player, missile, ball)\n"
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<< "; P = PGFX directive, shown as '*' (stored in playfield)\n\n"
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<< " processor 6502\n\n";
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<< " processor 6502\n\n";
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bool addrUsed = false;
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for(uInt16 addr = 0x00; addr <= 0x0F; ++addr)
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@ -1093,15 +1092,15 @@ string CartDebug::saveDisassembly()
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<< ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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for(uInt16 addr = 0x00; addr <= 0x0F; ++addr)
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if(myReserved.TIARead[addr] && ourTIAMnemonicR[addr])
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out << ALIGN(6) << ourTIAMnemonicR[addr] << " = $"
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out << ALIGN(16) << ourTIAMnemonicR[addr] << "= $"
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<< Base::HEX2 << right << addr << " ; (R)\n";
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for(uInt16 addr = 0x00; addr <= 0x3F; ++addr)
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if(myReserved.TIAWrite[addr] && ourTIAMnemonicW[addr])
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out << ALIGN(6) << ourTIAMnemonicW[addr] << " = $"
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out << ALIGN(16) << ourTIAMnemonicW[addr] << "= $"
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<< Base::HEX2 << right << addr << " ; (W)\n";
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for(uInt16 addr = 0x00; addr <= 0x17; ++addr)
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if(myReserved.IOReadWrite[addr] && ourIOMnemonic[addr])
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out << ALIGN(6) << ourIOMnemonic[addr] << " = $"
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out << ALIGN(16) << ourIOMnemonic[addr] << "= $"
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<< Base::HEX4 << right << (addr+0x280) << "\n";
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}
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@ -1118,7 +1117,7 @@ string CartDebug::saveDisassembly()
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if(myReserved.ZPRAM[addr-0x80] &&
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myUserLabels.find(addr) == myUserLabels.end())
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{
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out << ALIGN(6) << ourZPMnemonic[addr-0x80] << " = $"
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out << ALIGN(16) << ourZPMnemonic[addr-0x80] << "= $"
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<< Base::HEX2 << right << (addr) << "\n";
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}
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}
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@ -1130,7 +1129,7 @@ string CartDebug::saveDisassembly()
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<< "; NON LOCATABLE\n"
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<< ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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for(const auto& iter: myReserved.Label)
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out << ALIGN(10) << iter.second << " = $" << iter.first << "\n";
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out << ALIGN(16) << iter.second << "= $" << iter.first << "\n";
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}
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if(myUserLabels.size() > 0)
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@ -1138,11 +1137,11 @@ string CartDebug::saveDisassembly()
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out << "\n;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n"
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<< "; USER DEFINED\n"
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<< ";;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;\n\n";
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int max_len = 0;
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int max_len = 16;
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for(const auto& iter: myUserLabels)
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max_len = std::max(max_len, int(iter.second.size()));
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for(const auto& iter: myUserLabels)
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out << ALIGN(max_len) << iter.second << " = $" << iter.first << "\n";
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out << ALIGN(max_len) << iter.second << "= $" << iter.first << "\n";
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}
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// And finally, output the disassembly
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@ -1156,7 +1155,7 @@ string CartDebug::saveRom()
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{
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const string& rom = myConsole.properties().get(Cartridge_Name) + ".a26";
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FilesystemNode node(myOSystem.defaultSaveDir() + rom);
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FilesystemNode node(myOSystem.defaultSaveDir() + "ROMs\\" + rom);
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ofstream out(node.getPath(), std::ios::binary);
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if(out && myConsole.cartridge().saveROM(out))
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return "saved ROM as " + node.getShortPath();
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@ -76,6 +76,7 @@ class CartDebug : public DebuggerSystem
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string label;
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string disasm;
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string ccount;
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string ctotal;
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string bytes;
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bool hllabel;
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};
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File diff suppressed because it is too large
Load Diff
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@ -83,7 +83,11 @@ class DiStella
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void disasm(uInt32 distart, int pass);
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bool check_range(uInt16 start, uInt16 end) const;
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int mark(uInt32 address, uInt8 mask, bool directive = false);
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bool check_bit(uInt16 address, uInt8 mask) const;
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bool checkBit(uInt16 address, uInt8 mask) const;
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bool DiStella::checkBits(uInt16 address, uInt8 mask, uInt8 notMask) const;
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void outputGraphics();
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void outputBytes(CartDebug::DisasmType type);
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// Convenience methods to generate appropriate labels
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inline void labelA12High(stringstream& buf, uInt8 op, uInt16 addr, int labfound)
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@ -114,7 +118,8 @@ class DiStella
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CartDebug::ReservedEquates& myReserved;
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stringstream myDisasmBuf;
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std::queue<uInt16> myAddressQueue;
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uInt16 myOffset, myPC, myPCEnd;
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uInt16 myOffset, myPC, myPCEnd, myPass;
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uInt16 mySegType;
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struct resource {
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uInt16 start;
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@ -461,7 +461,7 @@ void RomListWidget::drawWidget(bool hilite)
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s.vLine(_x + CheckboxWidget::boxSize() + 5, _y, _y + _h - 1, kColor);
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// Draw the list items
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int ccountw = _fontWidth << 2,
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int ccountw = _fontWidth << 3,
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large_disasmw = _w - l.x() - _labelWidth,
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medium_disasmw = large_disasmw - r.width(),
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small_disasmw = medium_disasmw - (ccountw << 1),
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@ -3640,7 +3640,7 @@ case 0x60:
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peek(0x0100 + SP++, DISASM_NONE);
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PC = peek(0x0100 + SP++, DISASM_NONE);
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PC |= (uInt16(peek(0x0100 + SP, DISASM_NONE)) << 8);
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peek(PC++, DISASM_CODE);
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peek(PC++, DISASM_NONE);
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}
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break;
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@ -845,7 +845,7 @@ define(M6502_RTS, `{
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peek(0x0100 + SP++, DISASM_NONE);
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PC = peek(0x0100 + SP++, DISASM_NONE);
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PC |= (uInt16(peek(0x0100 + SP, DISASM_NONE)) << 8);
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peek(PC++, DISASM_CODE);
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peek(PC++, DISASM_NONE);
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}')
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define(M6502_SAX, `{
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