ShuriZma
/
stella
mirror of https://github.com/stella-emu/stella.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

some magic numbers replaced 

(and fixed a bug regarding offset into myCodeAccessBase)
This commit is contained in:
thrust26 2017-11-28 16:38:01 +01:00
parent b0a373285b
commit 8d42af251e
2 changed files with 29 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
src/emucore/CartMNetwork.cxx
View File

@ -87,7 +87,7 @@ uInt8 CartridgeMNetwork::peek(uInt16 address)
// Switch banks if necessary // Switch banks if necessary
checkSwitchBank(address); checkSwitchBank(address);
if((myCurrentSlice[0] == myRAMSlice) && (address < 0x0400)) if((myCurrentSlice[0] == myRAMSlice) && (address < BANK_SIZE / 2))
{ {
// Reading from the 1K write port @ $1000 triggers an unwanted write // Reading from the 1K write port @ $1000 triggers an unwanted write
uInt8 value = mySystem->getDataBusState(0xFF); uInt8 value = mySystem->getDataBusState(0xFF);
@ -97,7 +97,7 @@ uInt8 CartridgeMNetwork::peek(uInt16 address)
else else
{ {
triggerReadFromWritePort(peekAddress); triggerReadFromWritePort(peekAddress);
return myRAM[address & 0x03FF] = value; return myRAM[address & (BANK_SIZE / 2 - 1)] = value;
} }
} }
else if((address >= 0x0800) && (address <= 0x08FF)) else if((address >= 0x0800) && (address <= 0x08FF))
@ -114,7 +114,7 @@ uInt8 CartridgeMNetwork::peek(uInt16 address)
} }
} }
else else
return myImage[(myCurrentSlice[address >> 11] << 11) + (address & (BANK_SIZE-1))]; return myImage[(myCurrentSlice[address >> 11] << 11) + (address & (BANK_SIZE - 1))];
} }
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
@ -138,7 +138,7 @@ void CartridgeMNetwork::bankRAM(uInt16 bank)
// Remember what bank we're in // Remember what bank we're in
myCurrentRAM = bank; myCurrentRAM = bank;
uInt16 offset = bank << 8; uInt16 offset = bank << 8; // * RAM_SLICE_SIZE (256)
// Setup the page access methods for the current bank // Setup the page access methods for the current bank
System::PageAccess access(this, System::PA_WRITE); System::PageAccess access(this, System::PA_WRITE);
@ -147,7 +147,7 @@ void CartridgeMNetwork::bankRAM(uInt16 bank)
for(uInt16 addr = 0x1800; addr < 0x1900; addr += System::PAGE_SIZE) for(uInt16 addr = 0x1800; addr < 0x1900; addr += System::PAGE_SIZE)
{ {
access.directPokeBase = &myRAM[1024 + offset + (addr & 0x00FF)]; access.directPokeBase = &myRAM[1024 + offset + (addr & 0x00FF)];
access.codeAccessBase = &myCodeAccessBase[0x2000 + 1024 + offset + (addr & 0x00FF)]; access.codeAccessBase = &myCodeAccessBase[bankCount() * BANK_SIZE + BANK_SIZE / 2 + offset + (addr & 0x00FF)];
mySystem->setPageAccess(addr, access); mySystem->setPageAccess(addr, access);
} }
@ -157,7 +157,7 @@ void CartridgeMNetwork::bankRAM(uInt16 bank)
for(uInt16 addr = 0x1900; addr < 0x1A00; addr += System::PAGE_SIZE) for(uInt16 addr = 0x1900; addr < 0x1A00; addr += System::PAGE_SIZE)
{ {
access.directPeekBase = &myRAM[1024 + offset + (addr & 0x00FF)]; access.directPeekBase = &myRAM[1024 + offset + (addr & 0x00FF)];
access.codeAccessBase = &myCodeAccessBase[0x2000 + 1024 + offset + (addr & 0x00FF)]; access.codeAccessBase = &myCodeAccessBase[bankCount() * BANK_SIZE + BANK_SIZE / 2 + offset + (addr & 0x00FF)];
mySystem->setPageAccess(addr, access); mySystem->setPageAccess(addr, access);
} }
myBankChanged = true; myBankChanged = true;
@ -170,7 +170,7 @@ bool CartridgeMNetwork::bank(uInt16 slice)
// Remember what bank we're in // Remember what bank we're in
myCurrentSlice[0] = slice; myCurrentSlice[0] = slice;
uInt16 offset = slice << 11; uInt16 offset = slice << 11; // * BANK_SIZE (2048)
// Setup the page access methods for the current bank // Setup the page access methods for the current bank
if(slice != myRAMSlice) if(slice != myRAMSlice)
@ -178,10 +178,10 @@ bool CartridgeMNetwork::bank(uInt16 slice)
System::PageAccess access(this, System::PA_READ); System::PageAccess access(this, System::PA_READ);
// Map ROM image into first segment // Map ROM image into first segment
for(uInt16 addr = 0x1000; addr < 0x1800; addr += System::PAGE_SIZE) for(uInt16 addr = 0x1000; addr < 0x1000 + BANK_SIZE; addr += System::PAGE_SIZE)
{ {
access.directPeekBase = &myImage[offset + (addr & (BANK_SIZE-1))]; access.directPeekBase = &myImage[offset + (addr & (BANK_SIZE - 1))];
access.codeAccessBase = &myCodeAccessBase[offset + (addr & (BANK_SIZE-1))]; access.codeAccessBase = &myCodeAccessBase[offset + (addr & (BANK_SIZE - 1))];
mySystem->setPageAccess(addr, access); mySystem->setPageAccess(addr, access);
} }
} }
@ -190,20 +190,20 @@ bool CartridgeMNetwork::bank(uInt16 slice)
System::PageAccess access(this, System::PA_WRITE); System::PageAccess access(this, System::PA_WRITE);
// Set the page accessing method for the 1K slice of RAM writing pages // Set the page accessing method for the 1K slice of RAM writing pages
for(uInt16 addr = 0x1000; addr < 0x1400; addr += System::PAGE_SIZE) for(uInt16 addr = 0x1000; addr < 0x1000 + BANK_SIZE / 2; addr += System::PAGE_SIZE)
{ {
access.directPokeBase = &myRAM[addr & 0x03FF]; access.directPokeBase = &myRAM[addr & (BANK_SIZE/2-1)];
access.codeAccessBase = &myCodeAccessBase[0x2000 + (addr & 0x03FF)]; access.codeAccessBase = &myCodeAccessBase[bankCount() * BANK_SIZE + (addr & (BANK_SIZE / 2 - 1))];
mySystem->setPageAccess(addr, access); mySystem->setPageAccess(addr, access);
} }
// Set the page accessing method for the 1K slice of RAM reading pages // Set the page accessing method for the 1K slice of RAM reading pages
access.directPokeBase = nullptr; access.directPokeBase = nullptr;
access.type = System::PA_READ; access.type = System::PA_READ;
for(uInt16 addr = 0x1400; addr < 0x1800; addr += System::PAGE_SIZE) for(uInt16 addr = 0x1000 + BANK_SIZE / 2; addr < 0x1000 + BANK_SIZE; addr += System::PAGE_SIZE)
{ {
access.directPeekBase = &myRAM[addr & 0x03FF]; access.directPeekBase = &myRAM[addr & (BANK_SIZE / 2 - 1)];
access.codeAccessBase = &myCodeAccessBase[0x2000 + (addr & 0x03FF)]; access.codeAccessBase = &myCodeAccessBase[bankCount() * BANK_SIZE + (addr & (BANK_SIZE / 2 - 1))];
mySystem->setPageAccess(addr, access); mySystem->setPageAccess(addr, access);
} }
} }
@ -259,7 +259,7 @@ bool CartridgeMNetwork::save(Serializer& out) const
try try
{ {
out.putString(name()); out.putString(name());
out.putShortArray(myCurrentSlice, 2); out.putShortArray(myCurrentSlice, NUM_SEGMENTS);
out.putShort(myCurrentRAM); out.putShort(myCurrentRAM);
out.putByteArray(myRAM, RAM_SIZE); out.putByteArray(myRAM, RAM_SIZE);
} catch(...) } catch(...)
@ -279,7 +279,7 @@ bool CartridgeMNetwork::load(Serializer& in)
if(in.getString() != name()) if(in.getString() != name())
return false; return false;
in.getShortArray(myCurrentSlice, 2); in.getShortArray(myCurrentSlice, NUM_SEGMENTS);
myCurrentRAM = in.getShort(); myCurrentRAM = in.getShort();
in.getByteArray(myRAM, RAM_SIZE); in.getByteArray(myRAM, RAM_SIZE);
} catch(...) } catch(...)

18
src/emucore/CartMNetwork.hxx
View File

@ -166,8 +166,12 @@ class CartridgeMNetwork : public Cartridge
void bankRAM(uInt16 bank); void bankRAM(uInt16 bank);
private: private:
const uInt32 BANK_SIZE = 0x800; // Size of a ROM or RAM bank
const uInt32 RAM_SIZE = 0x800; static const uInt32 BANK_SIZE = 0x800; // 2K
// Size of RAM in the cart
static const uInt32 RAM_SIZE = 0x800; // 1K + 4 * 256B = 2K
// number of slices with 4K address space
static const uInt32 NUM_SEGMENTS = 2;
/** /**
Check hotspots and switch bank if triggered. Check hotspots and switch bank if triggered.
@ -175,14 +179,14 @@ class CartridgeMNetwork : public Cartridge
virtual void checkSwitchBank(uInt16 address) = 0; virtual void checkSwitchBank(uInt16 address) = 0;
private: private:
// The 16K ROM image of the cartridge // The 16K ROM image of the cartridge (works for E78K too)
uInt8 myImage[16384]; uInt8 myImage[BANK_SIZE * 8];
// The 2048 bytes of RAM // The 2K of RAM
uInt8 myRAM[2048]; uInt8 myRAM[RAM_SIZE];
// Indicates which slice is in the segment // Indicates which slice is in the segment
uInt16 myCurrentSlice[2]; uInt16 myCurrentSlice[NUM_SEGMENTS];
// Indicates which 256 byte bank of RAM is being used // Indicates which 256 byte bank of RAM is being used
uInt16 myCurrentRAM; uInt16 myCurrentRAM;