diff --git a/src/debugger/CpuDebug.cxx b/src/debugger/CpuDebug.cxx index 78fa148d1..c0992d841 100644 --- a/src/debugger/CpuDebug.cxx +++ b/src/debugger/CpuDebug.cxx @@ -126,96 +126,96 @@ int CpuDebug::disassemble(int address, string& result, EquateList& list) // Are we looking at a read or write operation? // It will determine what type of label to use - bool isRead = (M6502::ourAccessModeTable[opcode] == M6502::Read); + bool isRead = (M6502::AccessModeTable[opcode] == M6502::Read); - switch(M6502::ourAddressingModeTable[opcode]) + switch(M6502::AddressModeTable[opcode]) { case M6502::Absolute: - buf << M6502::ourInstructionMnemonicTable[opcode] << " " + buf << M6502::InstructionMnemonicTable[opcode] << " " << list.getLabel(dpeek(mySystem, address + 1), isRead, 4) << " ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 3; break; case M6502::AbsoluteX: - buf << M6502::ourInstructionMnemonicTable[opcode] << " " + buf << M6502::InstructionMnemonicTable[opcode] << " " << list.getLabel(dpeek(mySystem, address + 1), isRead, 4) << ",x ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 3; break; case M6502::AbsoluteY: - buf << M6502::ourInstructionMnemonicTable[opcode] << " " + buf << M6502::InstructionMnemonicTable[opcode] << " " << list.getLabel(dpeek(mySystem, address + 1), isRead, 4) << ",y ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 3; break; case M6502::Immediate: - buf << M6502::ourInstructionMnemonicTable[opcode] << " #$" + buf << M6502::InstructionMnemonicTable[opcode] << " #$" << hex << setw(2) << setfill('0') << (int) mySystem.peek(address + 1) << " ; " - << dec << M6502::ourInstructionProcessorCycleTable[opcode]; + << dec << M6502::InstructionCycleTable[opcode]; count = 2; break; case M6502::Implied: - buf << M6502::ourInstructionMnemonicTable[opcode] << " ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + buf << M6502::InstructionMnemonicTable[opcode] << " ; " + << M6502::InstructionCycleTable[opcode]; count = 1; break; case M6502::Indirect: - buf << M6502::ourInstructionMnemonicTable[opcode] << " (" + buf << M6502::InstructionMnemonicTable[opcode] << " (" << list.getLabel(dpeek(mySystem, address + 1), isRead, 4) << ") ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 3; break; case M6502::IndirectX: - buf << M6502::ourInstructionMnemonicTable[opcode] << " (" + buf << M6502::InstructionMnemonicTable[opcode] << " (" << list.getLabel(mySystem.peek(address + 1), isRead, 2) << ",x) ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 2; break; case M6502::IndirectY: - buf << M6502::ourInstructionMnemonicTable[opcode] << " (" + buf << M6502::InstructionMnemonicTable[opcode] << " (" << list.getLabel(mySystem.peek(address + 1), isRead, 2) << "),y ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 2; break; case M6502::Relative: - buf << M6502::ourInstructionMnemonicTable[opcode] << " " + buf << M6502::InstructionMnemonicTable[opcode] << " " << list.getLabel(address + 2 + ((Int16)(Int8)mySystem.peek(address + 1)), isRead, 4) - << " ; " << M6502::ourInstructionProcessorCycleTable[opcode]; + << " ; " << M6502::InstructionCycleTable[opcode]; count = 2; break; case M6502::Zero: - buf << M6502::ourInstructionMnemonicTable[opcode] << " " + buf << M6502::InstructionMnemonicTable[opcode] << " " << list.getLabel(mySystem.peek(address + 1), isRead, 2) << " ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 2; break; case M6502::ZeroX: - buf << M6502::ourInstructionMnemonicTable[opcode] << " " + buf << M6502::InstructionMnemonicTable[opcode] << " " << list.getLabel(mySystem.peek(address + 1), isRead, 2) << ",x ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 2; break; case M6502::ZeroY: - buf << M6502::ourInstructionMnemonicTable[opcode] << " " + buf << M6502::InstructionMnemonicTable[opcode] << " " << list.getLabel(mySystem.peek(address + 1), isRead, 2) << ",y ; " - << M6502::ourInstructionProcessorCycleTable[opcode]; + << M6502::InstructionCycleTable[opcode]; count = 2; break; default: buf << "dc $" << hex << setw(2) << setfill('0') << (int) opcode << " ; " - << dec << M6502::ourInstructionProcessorCycleTable[opcode]; + << dec << M6502::InstructionCycleTable[opcode]; count = 1; break; } diff --git a/src/emucore/M6502.cxx b/src/emucore/M6502.cxx index cf15e3cfc..da11f9374 100644 --- a/src/emucore/M6502.cxx +++ b/src/emucore/M6502.cxx @@ -50,7 +50,7 @@ M6502::M6502(uInt32 systemCyclesPerProcessorCycle) // Compute the System Cycle table for(uInt32 t = 0; t < 256; ++t) { - myInstructionSystemCycleTable[t] = ourInstructionProcessorCycleTable[t] * + myInstructionSystemCycleTable[t] = InstructionCycleTable[t] * mySystemCyclesPerProcessorCycle; } @@ -418,6 +418,7 @@ bool M6502::load(Serializer& in) return true; } +#if 0 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ostream& operator<<(ostream& out, const M6502::AddressingMode& mode) { @@ -465,9 +466,78 @@ ostream& operator<<(ostream& out, const M6502::AddressingMode& mode) } return out; } +#endif + +#ifdef DEBUGGER_SUPPORT +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +void M6502::attach(Debugger& debugger) +{ + // Remember the debugger for this microprocessor + myDebugger = &debugger; +} // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -M6502::AddressingMode M6502::ourAddressingModeTable[256] = { +unsigned int M6502::addCondBreak(Expression *e, const string& name) +{ + myBreakConds.push_back(e); + myBreakCondNames.push_back(name); + return myBreakConds.size() - 1; +} + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +void M6502::delCondBreak(unsigned int brk) +{ + if(brk < myBreakConds.size()) + { + delete myBreakConds[brk]; + myBreakConds.remove_at(brk); + myBreakCondNames.remove_at(brk); + } +} + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +void M6502::clearCondBreaks() +{ + for(uInt32 i = 0; i < myBreakConds.size(); i++) + delete myBreakConds[i]; + + myBreakConds.clear(); + myBreakCondNames.clear(); +} + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +const StringList& M6502::getCondBreakNames() const +{ + return myBreakCondNames; +} + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +int M6502::evalCondBreaks() +{ + for(uInt32 i = 0; i < myBreakConds.size(); i++) + if(myBreakConds[i]->evaluate()) + return i; + + return -1; // no break hit +} + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +void M6502::setBreakPoints(PackedBitArray *bp) +{ + myBreakPoints = bp; +} + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +void M6502::setTraps(PackedBitArray *read, PackedBitArray *write) +{ + myReadTraps = read; + myWriteTraps = write; +} + +#endif + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +M6502::AddressingMode M6502::AddressModeTable[256] = { Implied, IndirectX, Invalid, IndirectX, // 0x0? Zero, Zero, Zero, Zero, Implied, Immediate, Implied, Immediate, @@ -550,7 +620,7 @@ M6502::AddressingMode M6502::ourAddressingModeTable[256] = { }; // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -M6502::AccessMode M6502::ourAccessModeTable[256] = { +M6502::AccessMode M6502::AccessModeTable[256] = { None, Read, None, Write, // 0x0? None, Read, Write, Write, None, Read, Write, Read, @@ -633,7 +703,7 @@ M6502::AccessMode M6502::ourAccessModeTable[256] = { }; // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -uInt32 M6502::ourInstructionProcessorCycleTable[256] = { +uInt32 M6502::InstructionCycleTable[256] = { // 0 1 2 3 4 5 6 7 8 9 a b c d e f 7, 6, 2, 8, 3, 3, 5, 5, 3, 2, 2, 2, 4, 4, 6, 6, // 0 2, 5, 2, 8, 4, 4, 6, 6, 2, 4, 2, 7, 4, 4, 7, 7, // 1 @@ -654,7 +724,7 @@ uInt32 M6502::ourInstructionProcessorCycleTable[256] = { }; // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -const char* M6502::ourInstructionMnemonicTable[256] = { +const char* M6502::InstructionMnemonicTable[256] = { "BRK", "ORA", "n/a", "slo", "nop", "ORA", "ASL", "slo", // 0x0? "PHP", "ORA", "ASLA", "anc", "nop", "ORA", "ASL", "slo", @@ -703,71 +773,3 @@ const char* M6502::ourInstructionMnemonicTable[256] = { "BEQ", "SBC", "n/a", "isb", "nop", "SBC", "INC", "isb", // 0xF? "SED", "SBC", "nop", "isb", "nop", "SBC", "INC", "isb" }; - -#ifdef DEBUGGER_SUPPORT -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -void M6502::attach(Debugger& debugger) -{ - // Remember the debugger for this microprocessor - myDebugger = &debugger; -} - -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -unsigned int M6502::addCondBreak(Expression *e, const string& name) -{ - myBreakConds.push_back(e); - myBreakCondNames.push_back(name); - return myBreakConds.size() - 1; -} - -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -void M6502::delCondBreak(unsigned int brk) -{ - if(brk < myBreakConds.size()) - { - delete myBreakConds[brk]; - myBreakConds.remove_at(brk); - myBreakCondNames.remove_at(brk); - } -} - -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -void M6502::clearCondBreaks() -{ - for(uInt32 i = 0; i < myBreakConds.size(); i++) - delete myBreakConds[i]; - - myBreakConds.clear(); - myBreakCondNames.clear(); -} - -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -const StringList& M6502::getCondBreakNames() const -{ - return myBreakCondNames; -} - -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -int M6502::evalCondBreaks() -{ - for(uInt32 i = 0; i < myBreakConds.size(); i++) - if(myBreakConds[i]->evaluate()) - return i; - - return -1; // no break hit -} - -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -void M6502::setBreakPoints(PackedBitArray *bp) -{ - myBreakPoints = bp; -} - -// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -void M6502::setTraps(PackedBitArray *read, PackedBitArray *write) -{ - myReadTraps = read; - myWriteTraps = write; -} - -#endif diff --git a/src/emucore/M6502.hxx b/src/emucore/M6502.hxx index a04ad0843..bf705c962 100644 --- a/src/emucore/M6502.hxx +++ b/src/emucore/M6502.hxx @@ -49,31 +49,9 @@ typedef Common::Array ExpressionList; */ class M6502 : public Serializable { - public: - /** - The 6502 debugger class is a friend who needs special access - */ + // The 6502 debugger class is a friend who needs special access friend class CpuDebug; - public: - /** - Enumeration of the 6502 addressing modes - */ - enum AddressingMode - { - Absolute, AbsoluteX, AbsoluteY, Immediate, Implied, - Indirect, IndirectX, IndirectY, Invalid, Relative, - Zero, ZeroX, ZeroY - }; - - /** - Enumeration of the 6502 access modes - */ - enum AccessMode - { - Read, Write, None - }; - public: /** Create a new 6502 microprocessor with the specified cycle @@ -182,14 +160,6 @@ class M6502 : public Serializable */ uInt32 distinctAccesses() const { return myNumberOfDistinctAccesses; } - /** - Overload the ostream output operator for addressing modes. - - @param out The stream to output the addressing mode to - @param mode The addressing mode to output - */ - friend ostream& operator<<(ostream& out, const AddressingMode& mode); - /** Saves the current state of this device to the given Serializer. @@ -213,25 +183,6 @@ class M6502 : public Serializable */ string name() const { return "M6502"; } - public: - /** - Get the addressing mode of the specified instruction - - @param opcode The opcode of the instruction - @return The addressing mode of the instruction - */ - AddressingMode addressingMode(uInt8 opcode) const - { return ourAddressingModeTable[opcode]; } - - /** - Get the access mode of the specified instruction - - @param opcode The opcode of the instruction - @return The access mode of the instruction - */ - AccessMode accessMode(uInt8 opcode) const - { return ourAccessModeTable[opcode]; } - #ifdef DEBUGGER_SUPPORT public: /** @@ -364,22 +315,40 @@ class M6502 : public Serializable #endif private: + /** + Enumeration of the 6502 addressing modes + */ + enum AddressingMode + { + Absolute, AbsoluteX, AbsoluteY, Immediate, Implied, + Indirect, IndirectX, IndirectY, Invalid, Relative, + Zero, ZeroX, ZeroY + }; + + /** + Enumeration of the 6502 access modes + */ + enum AccessMode + { + Read, Write, None + }; + /// Addressing mode for each of the 256 opcodes /// This specifies how the opcode argument is addressed - static AddressingMode ourAddressingModeTable[256]; + static AddressingMode AddressModeTable[256]; /// Access mode for each of the 256 opcodes /// This specifies how the opcode will access its argument - static AccessMode ourAccessModeTable[256]; + static AccessMode AccessModeTable[256]; /** Table of instruction processor cycle times. In some cases additional cycles will be added during the execution of an instruction. */ - static uInt32 ourInstructionProcessorCycleTable[256]; + static uInt32 InstructionCycleTable[256]; /// Table of instruction mnemonics - static const char* ourInstructionMnemonicTable[256]; + static const char* InstructionMnemonicTable[256]; }; #endif