From 7f65fad7cfd997320b0966727f497fd6d262c97a Mon Sep 17 00:00:00 2001 From: thrust26 Date: Sat, 16 Sep 2017 13:48:04 +0200 Subject: [PATCH] preliminary implementation for ZP-RAM access tracking extra access type flag for poke() --- src/debugger/CartDebug.cxx | 34 ++++++++++++---------------------- src/debugger/CartDebug.hxx | 4 +++- src/debugger/DiStella.cxx | 2 +- src/emucore/M6502.cxx | 2 +- src/emucore/M6532.cxx | 22 ++++++++++++++++++++-- src/emucore/M6532.hxx | 15 +++++++++++++++ 6 files changed, 52 insertions(+), 27 deletions(-) diff --git a/src/debugger/CartDebug.cxx b/src/debugger/CartDebug.cxx index b5a6bae5f..fce3ef569 100644 --- a/src/debugger/CartDebug.cxx +++ b/src/debugger/CartDebug.cxx @@ -970,8 +970,10 @@ string CartDebug::saveDisassembly() // been processed; therefore buffer output to a string first ostringstream buf; buf << "\n\n;***********************************************************\n" - << "; Program Code + Data\n" - << ";***********************************************************\n\n"; + << "; Bank " << myConsole.cartridge().getBank(); + if (myConsole.cartridge().bankCount() > 0) + buf << " / (0.." << myConsole.cartridge().bankCount() - 1 << ")"; + buf << "\n;***********************************************************\n\n"; // Use specific settings for disassembly output // This will most likely differ from what you see in the debugger @@ -1072,11 +1074,12 @@ string CartDebug::saveDisassembly() << "; ROM properties MD5 : " << myConsole.properties().get(Cartridge_MD5) << "\n" << "; Bankswitch type : " << myConsole.cartridge().about() << "\n;\n" << "; Legend: * = CODE not yet run (tentative code)\n" - << "; ! = taken branch crosses page\n" << "; D = DATA directive (referenced in some way)\n" << "; G = GFX directive, shown as '#' (stored in player, missile, ball)\n" - << "; P = PGFX directive, shown as '*' (stored in playfield)\n\n" - << " processor 6502\n\n"; + << "; P = PGFX directive, shown as '*' (stored in playfield)\n" + << "; i = indexed accessed only\n" + << "; ! = page crossed, 1 cycle penalty\n" + << "\n processor 6502\n\n"; bool addrUsed = false; for(uInt16 addr = 0x00; addr <= 0x0F; ++addr) @@ -1123,28 +1126,15 @@ string CartDebug::saveDisassembly() out << ALIGN(16) << ourZPMnemonic[addr - 0x80] << "= $" << Base::HEX2 << right << (addr) << "\n"; addLine = false; - }/* else if (Debugger::debugger().getAccessFlags(addr) & DATA) { + } else if (mySystem.getAccessFlags(addr) & DATA) { if (addLine) out << "\n"; - out << ALIGN(16) << ourZPMnemonic[addr - 0x80] << "= $" - << Base::HEX2 << right << (addr) << "; (*)\n"; + out << ALIGN(18) << ";" << "$" + << Base::HEX2 << right << (addr) << " (i)\n"; addLine = false; - }*/ else + } else addLine = true; } - for (uInt16 addr = 0x1000; addr <= 0x10FF; ++addr) - out << Debugger::debugger().getAccessFlags(addr) << "\n"; -/* - ; $93 - ; $94 - ; §94(*) - ; $96 - ; §97(*) - ; $98 - ; $99 - ; $9a - ; $9b(*) -*/ } if(myReserved.Label.size() > 0) diff --git a/src/debugger/CartDebug.hxx b/src/debugger/CartDebug.hxx index 4a8b0b965..1ec5be66b 100644 --- a/src/debugger/CartDebug.hxx +++ b/src/debugger/CartDebug.hxx @@ -68,7 +68,9 @@ class CartDebug : public DebuggerSystem GFX = 1 << 5, // 0x20, addresses loaded into GRPx registers PGFX = 1 << 4, // 0x10, addresses loaded into PFx registers DATA = 1 << 3, // 0x08, addresses loaded into registers other than GRPx / PFx - ROW = 1 << 2 // 0x04, all other addresses + ROW = 1 << 2, // 0x04, all other addresses + // special type for poke() + WRITE = TCODE // 0x40, address written to }; struct DisassemblyTag { DisasmType type; diff --git a/src/debugger/DiStella.cxx b/src/debugger/DiStella.cxx index e191256a1..db8a8bb04 100644 --- a/src/debugger/DiStella.cxx +++ b/src/debugger/DiStella.cxx @@ -527,7 +527,7 @@ void DiStella::disasm(uInt32 distart, int pass) // A complete line of disassembly (text, cycle count, and bytes) myDisasmBuf << nextLine.str() << "'" << ";" << std::dec << int(ourLookup[opcode].cycles) - << (addrMode == RELATIVE ? (ad & 0xf00) != ((myPC + myOffset) & 0xf00) ? "/4!" : "/3 " : " "); + << (addrMode == RELATIVE ? (ad & 0xf00) != ((myPC + myOffset) & 0xf00) ? "/3!" : "/3 " : " "); if ((opcode == 0x40 || opcode == 0x60 || opcode == 0x4c || opcode == 0x00 // code block end || checkBit(myPC, CartDebug::REFERENCED) // referenced address || ourLookup[opcode].rw_mode == WRITE && d1 == WSYNC) // strobe WSYNC diff --git a/src/emucore/M6502.cxx b/src/emucore/M6502.cxx index cb9e94cd0..33efa77a1 100644 --- a/src/emucore/M6502.cxx +++ b/src/emucore/M6502.cxx @@ -155,7 +155,7 @@ inline void M6502::poke(uInt16 address, uInt8 value) } #endif // DEBUGGER_SUPPORT - mySystem->poke(address, value, CartDebug::DATA); // can't think of anything else but data + mySystem->poke(address, value, CartDebug::WRITE); // can't think of anything else but data myLastPokeAddress = address; } diff --git a/src/emucore/M6532.cxx b/src/emucore/M6532.cxx index 9835a1577..ea7d69190 100644 --- a/src/emucore/M6532.cxx +++ b/src/emucore/M6532.cxx @@ -23,6 +23,10 @@ #include "Settings.hxx" #include "Switches.hxx" #include "System.hxx" +#ifdef DEBUGGER_SUPPORT + //#include "Debugger.hxx" + #include "CartDebug.hxx" +#endif #include "M6532.hxx" @@ -37,6 +41,7 @@ M6532::M6532(const Console& console, const Settings& settings) myInterruptFlag(false), myEdgeDetectPositive(false) { + createCodeAccessBase(0x80); } // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -156,9 +161,11 @@ void M6532::installDelegate(System& system, Device& device) // The two types of addresses are differentiated in peek/poke as follows: // (addr & 0x0200) == 0x0000 is ZP RAM (A9 is 0) // (addr & 0x0200) != 0x0000 is IO (A9 is 1) - for(uInt16 addr = 0; addr < 0x1000; addr += System::PAGE_SIZE) - if((addr & 0x0080) == 0x0080) + for (uInt16 addr = 0; addr < 0x1000; addr += System::PAGE_SIZE) + if ((addr & 0x0080) == 0x0080) { + access.codeAccessBase = &myCodeAccessBase[addr & 0x7f]; mySystem->setPageAccess(addr, access); + } } // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - @@ -445,3 +452,14 @@ uInt32 M6532::timerClocks() const { return uInt32(mySystem->cycles() - mySetTimerCycle); } + +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +void M6532::createCodeAccessBase(uInt32 size) +{ +#ifdef DEBUGGER_SUPPORT + myCodeAccessBase = make_unique(size); + memset(myCodeAccessBase.get(), CartDebug::NONE, size); +#else + myCodeAccessBase = nullptr; +#endif +} \ No newline at end of file diff --git a/src/emucore/M6532.hxx b/src/emucore/M6532.hxx index 4076169f4..b5d7e96b9 100644 --- a/src/emucore/M6532.hxx +++ b/src/emucore/M6532.hxx @@ -139,6 +139,17 @@ class M6532 : public Device uInt8 timint(); Int32 intimClocks(); uInt32 timerClocks() const; +//#ifdef DEBUGGER_SUPPORT + void createCodeAccessBase(uInt32 size); +/* / ** + Query/change the given address type to use the given disassembly flags + + @param address The address to modify + @param flags A bitfield of DisasmType directives for the given address + * / + uInt8 getAccessFlags(uInt16 address) const override; + void setAccessFlags(uInt16 address, uInt8 flags) override; +#endif // DEBUGGER_SUPPORT*/ private: // Accessible bits in the interrupt flag register @@ -198,6 +209,10 @@ class M6532 : public Device // Last value written to the timer registers uInt8 myOutTimer[4]; +//#ifdef DEBUGGER_SUPPORT + BytePtr myCodeAccessBase; +//#endif // DEBUGGER_SUPPORT + private: // Following constructors and assignment operators not supported M6532() = delete;