mirror of https://github.com/stella-emu/stella.git
Updated the comment/explanation of the bankswitch scheme so that it reflects our current thinking on how the scheme should work.
git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2961 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
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@ -35,26 +35,29 @@ class CartridgeDASHWidget;
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Kind of a combination of 3F and 3E, with better switchability.
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Kind of a combination of 3F and 3E, with better switchability.
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B.Watson's Cart3E was used as a template for building this implementation.
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B.Watson's Cart3E was used as a template for building this implementation.
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Because a single bank number is used to define both the destination (0-3)
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The destination bank (0-3) is held in the top bits of the value written to
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AND the type (ROM/RAM) there are only 5 bits left to indicate the actual bank
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$3E (for RAM switching) or $3F (for ROM switching). The low 6 bits give
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number. This sets the limits of 32K ROM and 16K RAM.
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the actual bank number (0-63) corresponding to 512 byte blocks for RAM and
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1024 byte blocks for ROM. The maximum size is therefore 32K RAM and 64K ROM.
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D7 RAM/ROM flag (1=RAM)
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D7D6 indicate the bank number (0-3)
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D6D5 indicate the bank number (0-3)
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D5D4D3D2D1D0 indicate the actual # (0-63) from the image/ram
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D4D3D2D1D0 indicate the actual # (0-31) from the image/ram
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Hotspot 0x3F is used for bank-switching, with the encoded bank # as above.
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ROM:
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ROM:
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Note: in descriptions $F000 is equivalent to $1000 -- that is, we only deal
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with the low 13 bits of addressing. Stella code uses $1000, I'm used to $F000
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So, mask with top bits clear :) when reading this document.
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In this scheme, the 4K address space is broken into four 1K ROM segments.
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In this scheme, the 4K address space is broken into four 1K ROM segments.
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living at 0x1000, 0x1400, 0x1800, 0x1C00 (or, same thing, 0xF000... etc.),
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living at 0x1000, 0x1400, 0x1800, 0x1C00 (or, same thing, 0xF000... etc.),
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and four 512 byte RAM segments, living at 0x1000, 0x1200, 0x1400, 0x1600
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and four 512 byte RAM segments, living at 0x1000, 0x1200, 0x1400, 0x1600
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with write-mirrors +0x800 of these. The last 1K ROM ($FC00-$FFFF) segment
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with write-mirrors +0x800 of these. The last 1K ROM ($FC00-$FFFF) segment
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is initialised to point to the FIRST 1K of the ROM image, but it may be
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in the 6502 address space (ie: $1C00-$1FFF) is initialised to point to the
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switched out at any time. Note, this is DIFFERENT to 3E which switches in
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FIRST 1K of the ROM image, so the reset vectors must be placed at the
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the UPPER bank and this bank is fixed. This allows variable sized ROM
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end of the first 1K in the ROM image. Note, this is DIFFERENT to 3E which
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without having to detect size. First bank (0) in ROM is the default fixed
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switches in the UPPER bank and this bank is fixed. This allows variable sized
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ROM without having to detect size. First bank (0) in ROM is the default fixed
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bank mapped to $FC00.
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bank mapped to $FC00.
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The system requires the reset vectors to be valid on a reset, so either the
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The system requires the reset vectors to be valid on a reset, so either the
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@ -63,26 +66,28 @@ class CartridgeDASHWidget;
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into the last bank area. Currently the latter (programmer onus) is required,
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into the last bank area. Currently the latter (programmer onus) is required,
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but it would be nice for the cartridge hardware to auto-switch on reset.
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but it would be nice for the cartridge hardware to auto-switch on reset.
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ROM switching (write of block+bank number to $3F) D7=0 and D6D5 upper 2 bits of bank #
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ROM switching (write of block+bank number to $3F) D7D6 upper 2 bits of bank #
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indicates the destination segment (0-3, corresponding to $F000, $F400, $F800, $FC00),
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indicates the destination segment (0-3, corresponding to $F000, $F400, $F800,
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and lower 5 bits indicate the 1K bank to switch in. Can handle 32 x 1K ROM banks (32K total).
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$FC00), and lower 6 bits indicate the 1K bank to switch in. Can handle 64
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x 1K ROM banks (64K total).
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D7 D6 D5 D4D3D2D1D0
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D7 D6 D5D4D3D2D1D0
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0 0 0 x x x x x switch a 1K ROM bank xxxxx to $F000
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0 0 x x x x x x switch a 1K ROM bank xxxxx to $F000
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0 0 1 switch a 1K ROM bank xxxxx to $F400
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0 1 switch a 1K ROM bank xxxxx to $F400
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0 1 0 switch a 1K ROM bank xxxxx to $F800
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1 0 switch a 1K ROM bank xxxxx to $F800
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0 1 1 switch a 1K ROM bank xxxxx to $FC00
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1 1 switch a 1K ROM bank xxxxx to $FC00
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RAM switching (write of segment+bank number to $3F) with D7=1 and D6D5 upper 2 bits of bank #
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RAM switching (write of segment+bank number to $3E) with D7D6 upper 2 bits of
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indicates the destination RAM segment (0-3, corresponding to $F000, $F200, $F400, $F600).
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bank # indicates the destination RAM segment (0-3, corresponding to $F000,
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Note that this allows contiguous 2K of RAM to be configured by setting 4 consecutive RAM segments
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$F200, $F400, $F600). Note that this allows contiguous 2K of RAM to be
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each 512 bytes with consecutive addresses. However, as the write address of RAM is +0x800, this
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configured by setting 4 consecutive RAM segments each 512 bytes with
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consecutive addresses. However, as the write address of RAM is +0x800, this
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invalidates ROM access as described below.
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invalidates ROM access as described below.
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can handle 32 x 512 byte RAM banks (16K total)
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can handle 64 x 512 byte RAM banks (32K total)
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D7 D6 D5 D4D3D2D1D0
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D7 D6 D5D4D3D2D1D0
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1 0 0 x x x x x switch a 512 byte RAM bank xxxxx to $F000 with write @ $F800
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0 0 x x x x x x switch a 512 byte RAM bank xxxxx to $F000 with write @ $F800
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0 1 switch a 512 byte RAM bank xxxxx to $F200 with write @ $FA00
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0 1 switch a 512 byte RAM bank xxxxx to $F200 with write @ $FA00
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1 0 switch a 512 byte RAM bank xxxxx to $F400 with write @ $FC00
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1 0 switch a 512 byte RAM bank xxxxx to $F400 with write @ $FC00
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1 1 switch a 512 byte RAM bank xxxxx to $F600 with write @ $FE00
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1 1 switch a 512 byte RAM bank xxxxx to $F600 with write @ $FE00
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@ -113,12 +118,9 @@ class CartridgeDASHWidget;
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Switching in RAM block 1 makes F200-F3FF ROM inaccessible, however F000-F1FF is
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Switching in RAM block 1 makes F200-F3FF ROM inaccessible, however F000-F1FF is
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still readable. So, care must be paid.
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still readable. So, care must be paid.
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TODO: THe partial reading of ROM blocks switched out by RAM is not yet implemented!!
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This crazy RAM layout is useful as it allows contiguous RAM to be switched in,
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This crazy RAM layout is useful as it allows contiguous RAM to be switched in,
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up to 2K in one sequentially accessible block. This means you CAN have 2K of
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up to 2K in one sequentially accessible block. This means you CAN have 2K of
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consecutive RAM. If you don't detect ROM write area, then you would have NO ROM
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consecutive RAM (don't forget to copy your reset vectors!)
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switched in (don't forget to copy your reset vectors!)
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@author Andrew Davie
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@author Andrew Davie
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*/
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*/
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@ -232,8 +234,6 @@ private:
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bool bankROM(uInt8 bank); // switch a ROM bank
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bool bankROM(uInt8 bank); // switch a ROM bank
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uInt32 mySize; // Size of the ROM image
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uInt8* myImage; // Pointer to a dynamically allocated ROM image of the cartridge
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// We have an array that indicates for each of the 8 512 byte areas of the address space, which ROM/RAM
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// We have an array that indicates for each of the 8 512 byte areas of the address space, which ROM/RAM
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@ -266,7 +266,9 @@ private:
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static const Int16 BANK_UNDEFINED = -1; // bank is undefined and inaccessible
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static const Int16 BANK_UNDEFINED = -1; // bank is undefined and inaccessible
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uInt8 myRAM[RAM_TOTAL_SIZE];
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uInt32 mySize; // Size of the ROM image
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uInt8* myImage; // Pointer to a dynamically allocated ROM image of the cartridge
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uInt8* myRAM; // on the heap, not stack :)
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};
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};
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#endif
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#endif
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