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Updated changelog for debugger bugfixes. 

git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2503 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
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stephena 2012-05-27 13:18:24 +00:00
parent 8f65771872
commit 60912d6f38
1 changed files with 7 additions and 3 deletions
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@ -40,9 +40,13 @@
a multi-file archive before using each ROM. Thanks go to Roland a multi-file archive before using each ROM. Thanks go to Roland
Schabenberger (webOS maintainer) for this idea and sample code. Schabenberger (webOS maintainer) for this idea and sample code.
* Fixed bug in disassembly of zero-page code; addresses no longer have * Fixed several bugs in debugger disassembly:
their high-byte truncated, and system equates (TIA and I/O registers) - Zero-page code addresses no longer have their high-byte
are now properly marked as such. truncated, and system equates (TIA and I/O registers) are now
properly marked as such.
- The Distella '-r' option (Relocate calls out of address range)
is no longer the default, resulting in output more consistent
with normal usage of Distella.
* Fixed bug in EFSC bankswitch scheme state saving; the Superchip RAM * Fixed bug in EFSC bankswitch scheme state saving; the Superchip RAM
wasn't actually being loaded and saved to state files. wasn't actually being loaded and saved to state files.