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Added equates used to the disassembled output. This is the same as how 

DiStella works, so you don't have to include a vcs.h file.


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2659 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
This commit is contained in:
stephena 2013-03-05 18:01:55 +00:00
parent ffc99a9345
commit 5d5719e390
4 changed files with 98 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

56
src/debugger/CartDebug.cxx
View File

@ -64,11 +64,20 @@ CartDebug::CartDebug(Debugger& dbg, Console& console, const OSystem& osystem)
// Add system equates
for(uInt16 addr = 0x00; addr <= 0x0F; ++addr)
{
mySystemAddresses.insert(make_pair(ourTIAMnemonicR[addr], addr));
myReserved.TIARead[addr] = false;
}
for(uInt16 addr = 0x00; addr <= 0x3F; ++addr)
{
mySystemAddresses.insert(make_pair(ourTIAMnemonicW[addr], addr));
myReserved.TIAWrite[addr] = false;
}
for(uInt16 addr = 0x280; addr <= 0x297; ++addr)
{
mySystemAddresses.insert(make_pair(ourIOMnemonic[addr-0x280], addr));
myReserved.IOReadWrite[addr-0x280] = false;
}
// Add settings for Distella
DiStella::settings.gfx_format =
@ -284,7 +293,7 @@ bool CartDebug::fillDisassemblyList(BankInfo& info, bool resolvedata, uInt16 sea
myDisassembly.list.reserve(2048);
myDisassembly.fieldwidth = 10 + myLabelLength;
DiStella distella(*this, myDisassembly.list, info, DiStella::settings,
myDisLabels, myDisDirectives, resolvedata);
myDisLabels, myDisDirectives, myReserved, resolvedata);
// Parts of the disassembly will be accessed later in different ways
// We place those parts in separate maps, to speed up access
@ -323,7 +332,7 @@ string CartDebug::disassemble(uInt16 start, uInt16 lines) const
uInt8 labels[0x1000], directives[0x1000];
info.addressList.push_back(start);
DiStella distella(*this, disasm.list, info, DiStella::settings,
(uInt8*)labels, (uInt8*)directives, false);
labels, directives, (ReservedEquates&)myReserved, false);
// Fill the string with disassembled data
start &= 0xFFF;
@ -854,19 +863,31 @@ string CartDebug::saveDisassembly(string file)
time(&currtime);
buf << "; Disassembly of " << file << "\n"
<< "; Disassembled " << ctime(&currtime)
<< "; Using Stella " << STELLA_VERSION << "\n"
<< ";\n"
<< "; Command Line arguments: TODO - add args\n"
<< "\n"
<< "; Using Stella " << STELLA_VERSION << "\n;\n"
<< "; Command Line arguments: TODO - add args\n;\n"
<< "; Legend: * = CODE not yet run (preliminary code)\n"
<< "; D = DATA directive (referenced in some way)\n"
<< "; G = GFX directive, shown as 'X' (stored in player, missile, ball)\n"
<< "; P = PGFX directive, shown as 'x' (stored in playfield)\n"
<< "\n"
<< " processor 6502\n"
<< " TODO - add equates\n"
<< "\n";
<< "; G = GFX directive, shown as '#' (stored in player, missile, ball)\n"
<< "; P = PGFX directive, shown as '*' (stored in playfield)\n"
<< "\n processor 6502\n\n";
for(uInt16 addr = 0x00; addr <= 0x0F; ++addr)
if(myReserved.TIARead[addr] && ourTIAMnemonicR[addr][0] != '$')
buf << ALIGN(7) << ourTIAMnemonicR[addr] << " = $"
<< HEX2 << addr << " ; (R)\n";
for(uInt16 addr = 0x00; addr <= 0x3F; ++addr)
if(myReserved.TIAWrite[addr] && ourTIAMnemonicW[addr][0] != '$')
buf << ALIGN(7) << ourTIAMnemonicW[addr] << " = $"
<< HEX2 << addr << " ; (W)\n";
for(uInt16 addr = 0x00; addr <= 0x17; ++addr)
if(myReserved.IOReadWrite[addr] && ourIOMnemonic[addr][0] != '$')
buf << ALIGN(7) << ourIOMnemonic[addr] << " = $"
<< HEX4 << right << (addr+0x280) << "\n";
buf << "\n";
// Use specific settings for disassembly output
// This will most likely differ from what you see in the debugger
DiStella::Settings settings;
@ -884,7 +905,7 @@ string CartDebug::saveDisassembly(string file)
// Disassemble bank
disasm.list.clear(false); // don't fully de-allocate space
DiStella distella(*this, disasm.list, info, settings,
myDisLabels, myDisDirectives, true);
myDisLabels, myDisDirectives, myReserved, true);
buf << " ORG $" << HEX4 << info.offset << "\n\n";
@ -920,7 +941,7 @@ string CartDebug::saveDisassembly(string file)
{
buf << tag.disasm.substr(0, 9) << " ; |";
for(int i = 12; i < 20; ++i)
buf << ((tag.disasm[i] == '\x1e') ? "X" : " ");
buf << ((tag.disasm[i] == '\x1e') ? "#" : " ");
buf << "| $" << HEX4 << tag.address << " (G)\n";
break;
}
@ -928,7 +949,7 @@ string CartDebug::saveDisassembly(string file)
{
buf << tag.disasm.substr(0, 9) << " ; |";
for(int i = 12; i < 20; ++i)
buf << ((tag.disasm[i] == '\x1f') ? "x" : " ");
buf << ((tag.disasm[i] == '\x1f') ? "*" : " ");
buf << "| $" << HEX4 << tag.address << " (P)\n";
break;
}
@ -1081,7 +1102,8 @@ void CartDebug::getBankDirectives(ostream& buf, BankInfo& info) const
// Disassemble the bank, then scan it for an up-to-date description
DisassemblyList list;
DiStella distella(*this, list, info, DiStella::settings,
(uInt8*)myDisLabels, (uInt8*)myDisDirectives, true);
(uInt8*)myDisLabels, (uInt8*)myDisDirectives,
(ReservedEquates&)myReserved, true);
if(list.size() == 0)
return;

8
src/debugger/CartDebug.hxx
View File

@ -290,6 +290,14 @@ class CartDebug : public DebuggerSystem
// Address type information determined by Distella
uInt8 myDisLabels[0x1000], myDisDirectives[0x1000];
// Information on equates used in the disassembly
typedef struct {
bool TIARead[16];
bool TIAWrite[64];
bool IOReadWrite[24];
} ReservedEquates;
ReservedEquates myReserved;
// Actually call DiStella to fill the DisassemblyList structure
// Return whether the search address was actually in the list
bool fillDisassemblyList(BankInfo& bankinfo, bool resolvedata, uInt16 search);

54
src/debugger/DiStella.cxx
View File

@ -24,10 +24,12 @@
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
DiStella::DiStella(const CartDebug& dbg, CartDebug::DisassemblyList& list,
CartDebug::BankInfo& info, const DiStella::Settings& settings,
uInt8* labels, uInt8* directives, bool resolvedata)
uInt8* labels, uInt8* directives,
CartDebug::ReservedEquates& reserved, bool resolvedata)
: myDbg(dbg),
myList(list),
mySettings(settings),
myReserved(reserved),
myLabels(labels),
myDirectives(directives)
{
@ -473,6 +475,7 @@ void DiStella::disasm(uInt32 distart, int pass)
{
nextline << CartDebug::ourIOMnemonic[ad-0x280];
nextlinebytes << HEX2 << (int)(ad&0xff) << " " << HEX2 << (int)(ad>>8);
myReserved.IOReadWrite[ad-0x280] = true;
}
else if (labfound == 4 && mySettings.rflag)
{
@ -496,8 +499,18 @@ void DiStella::disasm(uInt32 distart, int pass)
if (pass == 3)
{
if (labfound == 2)
nextline << " " << (ourLookup[op].rw_mode == READ ?
CartDebug::ourTIAMnemonicR[d1&0x0f] : CartDebug::ourTIAMnemonicW[d1&0x3f]);
{
if(ourLookup[op].rw_mode == READ)
{
nextline << " " << CartDebug::ourTIAMnemonicR[d1&0x0f];
myReserved.TIARead[d1&0x0f] = true;
}
else
{
nextline << " " << CartDebug::ourTIAMnemonicW[d1&0x3f];
myReserved.TIAWrite[d1&0x3f] = true;
}
}
else
nextline << " $" << HEX2 << (int)d1;
@ -545,6 +558,7 @@ void DiStella::disasm(uInt32 distart, int pass)
{
nextline << CartDebug::ourIOMnemonic[ad-0x280] << ",X";
nextlinebytes << HEX2 << (int)(ad&0xff) << " " << HEX2 << (int)(ad>>8);
myReserved.IOReadWrite[ad-0x280] = true;
}
else if (labfound == 4 && mySettings.rflag)
{
@ -589,6 +603,7 @@ void DiStella::disasm(uInt32 distart, int pass)
{
nextline << CartDebug::ourIOMnemonic[ad-0x280] << ",Y";
nextlinebytes << HEX2 << (int)(ad&0xff) << " " << HEX2 << (int)(ad>>8);
myReserved.IOReadWrite[ad-0x280] = true;
}
else if (labfound == 4 && mySettings.rflag)
{
@ -634,9 +649,18 @@ void DiStella::disasm(uInt32 distart, int pass)
if (pass == 3)
{
if (labfound == 2)
nextline << " " << (ourLookup[op].rw_mode == READ ?
CartDebug::ourTIAMnemonicR[d1&0x0f] :
CartDebug::ourTIAMnemonicW[d1&0x3f]) << ",X";
{
if(ourLookup[op].rw_mode == READ)
{
nextline << " " << CartDebug::ourTIAMnemonicR[d1&0x0f] << ",X";
myReserved.TIARead[d1&0x0f] = true;
}
else
{
nextline << " " << CartDebug::ourTIAMnemonicW[d1&0x3f] << ",X";
myReserved.TIAWrite[d1&0x3f] = true;
}
}
else
nextline << " $" << HEX2 << (int)d1 << ",X";
}
@ -651,9 +675,18 @@ void DiStella::disasm(uInt32 distart, int pass)
if (pass == 3)
{
if (labfound == 2)
nextline << " " << (ourLookup[op].rw_mode == READ ?
CartDebug::ourTIAMnemonicR[d1&0x0f] :
CartDebug::ourTIAMnemonicW[d1&0x3f]) << ",Y";
{
if(ourLookup[op].rw_mode == READ)
{
nextline << " " << CartDebug::ourTIAMnemonicR[d1&0x0f] << ",Y";
myReserved.TIARead[d1&0x0f] = true;
}
else
{
nextline << " " << CartDebug::ourTIAMnemonicW[d1&0x3f] << ",Y";
myReserved.TIAWrite[d1&0x3f] = true;
}
}
else
nextline << " $" << HEX2 << (int)d1 << ",Y";
}
@ -716,7 +749,10 @@ void DiStella::disasm(uInt32 distart, int pass)
USER_OR_AUTO_LABEL("(", ad, ")");
}
else if (labfound == 3)
{
nextline << "(" << CartDebug::ourIOMnemonic[ad-0x280] << ")";
myReserved.IOReadWrite[ad-0x280] = true;
}
else
nextline << "($" << HEX4 << ad << ")";

8
src/debugger/DiStella.hxx
View File

@ -62,11 +62,13 @@ class DiStella
@param settings The various distella flags/options to use
@param labels Array storing label info determined by Distella
@param directives Array storing directive info determined by Distella
@param reserved The TIA/RIOT addresses referenced in the disassembled code
@param resolvedata If enabled, try to determine code vs. data sections
*/
DiStella(const CartDebug& dbg, CartDebug::DisassemblyList& list,
CartDebug::BankInfo& info, const DiStella::Settings& settings,
uInt8* labels, uInt8* directives, bool resolvedata);
uInt8* labels, uInt8* directives,
CartDebug::ReservedEquates& reserved, bool resolvedata);
~DiStella();
@ -90,6 +92,7 @@ class DiStella
const CartDebug& myDbg;
CartDebug::DisassemblyList& myList;
const Settings& mySettings;
CartDebug::ReservedEquates& myReserved;
stringstream myDisasmBuf;
queue<uInt16> myAddressQueue;
uInt16 myOffset, myPC, myPCBeg, myPCEnd;
@ -103,7 +106,8 @@ class DiStella
/* Stores info on how each address is marked, both in the general
case as well as when manual directives are enabled (in which case
the directives take priority
The address mark type is defined in CartDebug.hxx */
The address mark type is defined in CartDebug.hxx
*/
uInt8 *myLabels, *myDirectives;
/**