mirror of https://github.com/stella-emu/stella.git
Updated RWP stuff for 'E7' scheme.
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@ -69,10 +69,10 @@ void CartridgeMNetwork::setAccess(uInt16 addrFrom, uInt16 size,
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for(uInt16 addr = addrFrom; addr < addrFrom + size; addr += System::PAGE_SIZE)
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{
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if (type == System::PA_READ)
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if(type == System::PA_READ)
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access.directPeekBase = &directData[directOffset + (addr & addrMask)];
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if(type == System::PA_WRITE)
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access.directPokeBase = &directData[directOffset + (addr & addrMask)];
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else if(type == System::PA_WRITE) // all RAM writes mapped to ::poke()
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access.directPokeBase = nullptr;
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access.codeAccessBase = &myCodeAccessBase[codeOffset + (addr & addrMask)];
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mySystem->setPageAccess(addr, access);
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}
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@ -117,46 +117,38 @@ uInt8 CartridgeMNetwork::peek(uInt16 address)
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if((myCurrentSlice[0] == myRAMSlice) && (address < BANK_SIZE / 2))
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{
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// Reading from the 1K write port @ $1000 triggers an unwanted write
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uInt8 value = mySystem->getDataBusState(0xFF);
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if(bankLocked())
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return value;
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else
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{
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myRAM[address & (BANK_SIZE / 2 - 1)] = value;
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triggerReadFromWritePort(peekAddress);
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return value;
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}
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return peekRAM(myRAM[address & (BANK_SIZE / 2 - 1)], peekAddress);
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}
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else if((address >= 0x0800) && (address <= 0x08FF))
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{
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// Reading from the 256B write port @ $1800 triggers an unwanted write
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uInt8 value = mySystem->getDataBusState(0xFF);
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if(bankLocked())
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return value;
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else
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{
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myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)] = value;
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triggerReadFromWritePort(peekAddress);
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return value;
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}
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return peekRAM(myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)], peekAddress);
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}
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else
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return myImage[(myCurrentSlice[address >> 11] << 11) + (address & (BANK_SIZE - 1))];
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeMNetwork::poke(uInt16 address, uInt8)
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bool CartridgeMNetwork::poke(uInt16 address, uInt8 value)
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{
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uInt16 pokeAddress = address;
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address &= 0x0FFF;
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// Switch banks if necessary
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checkSwitchBank(address);
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// NOTE: This does not handle writing to RAM, however, this
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// method should never be called for RAM because of the
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// way page accessing has been setup
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// All RAM writes are mapped here
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if((myCurrentSlice[0] == myRAMSlice) && (address < BANK_SIZE / 2))
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{
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pokeRAM(myRAM[address & (BANK_SIZE / 2 - 1)], pokeAddress, value);
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return true;
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}
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else if((address >= 0x0800) && (address <= 0x08FF))
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{
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pokeRAM(myRAM[1024 + (myCurrentRAM << 8) + (address & 0x00FF)], pokeAddress, value);
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return true;
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}
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return false;
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}
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