mirror of https://github.com/stella-emu/stella.git
Bugfixes to ADC/RRA and SBC/IBC opcodes in BCD mode. Thanks to the
guys on the Stella mailing list (especially Seagtgruff) for advice and sample test ROMs wrt BCD mode. git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1708 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
This commit is contained in:
stephena
parent
22311086fd
commit
41010aa5ee
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@ -13,7 +13,7 @@
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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// $Id: M6502.cxx,v 1.24 2009-01-01 18:13:38 stephena Exp $
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// $Id: M6502.cxx,v 1.25 2009-04-20 15:03:13 stephena Exp $
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//============================================================================
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#include "M6502.hxx"
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@ -37,16 +37,8 @@ M6502::M6502(uInt32 systemCyclesPerProcessorCycle)
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myWriteTraps = NULL;
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#endif
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// Compute the BCD lookup table
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uInt16 t;
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for(t = 0; t < 256; ++t)
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{
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ourBCDTable[0][t] = ((t >> 4) * 10) + (t & 0x0f);
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ourBCDTable[1][t] = (((t % 100) / 10) << 4) | (t % 10);
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}
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// Compute the System Cycle table
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for(t = 0; t < 256; ++t)
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for(uInt32 t = 0; t < 256; ++t)
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{
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myInstructionSystemCycleTable[t] = ourInstructionProcessorCycleTable[t] *
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mySystemCyclesPerProcessorCycle;
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@ -190,9 +182,6 @@ ostream& operator<<(ostream& out, const M6502::AddressingMode& mode)
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return out;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 M6502::ourBCDTable[2][256];
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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M6502::AddressingMode M6502::ourAddressingModeTable[256] = {
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Implied, IndirectX, Invalid, IndirectX, // 0x0?
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@ -461,8 +450,9 @@ void M6502::delCondBreak(unsigned int brk)
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void M6502::clearCondBreaks()
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{
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for(unsigned int i=0; i<myBreakConds.size(); i++)
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for(uInt32 i = 0; i < myBreakConds.size(); i++)
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delete myBreakConds[i];
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myBreakConds.clear();
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myBreakCondNames.clear();
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}
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@ -476,7 +466,7 @@ const StringList& M6502::getCondBreakNames() const
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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int M6502::evalCondBreaks()
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{
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for(unsigned int i=0; i<myBreakConds.size(); i++)
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for(uInt32 i = 0; i < myBreakConds.size(); i++)
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if(myBreakConds[i]->evaluate())
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return i;
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@ -495,4 +485,5 @@ void M6502::setTraps(PackedBitArray *read, PackedBitArray *write)
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myReadTraps = read;
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myWriteTraps = write;
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}
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#endif
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@ -13,7 +13,7 @@
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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// $Id: M6502.hxx,v 1.23 2009-01-01 18:13:38 stephena Exp $
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// $Id: M6502.hxx,v 1.24 2009-04-20 15:03:13 stephena Exp $
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//============================================================================
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#ifndef M6502_HXX
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@ -41,7 +41,7 @@ typedef Common::Array<Expression*> ExpressionList;
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has a 64K addressing space.
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@author Bradford W. Mott
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@version $Id: M6502.hxx,v 1.23 2009-01-01 18:13:38 stephena Exp $
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@version $Id: M6502.hxx,v 1.24 2009-04-20 15:03:13 stephena Exp $
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*/
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class M6502
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{
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@ -325,9 +325,6 @@ class M6502
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/// This specifies how the opcode will access its argument
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static AccessMode ourAccessModeTable[256];
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/// Lookup table used for binary-code-decimal math
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static uInt8 ourBCDTable[2][256];
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/**
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Table of instruction processor cycle times. In some cases additional
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cycles will be added during the execution of an instruction.
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@ -13,14 +13,17 @@
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// See the file "license" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//
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// $Id: M6502.m4,v 1.7 2008-04-27 11:53:22 stephena Exp $
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// $Id: M6502.m4,v 1.8 2009-04-20 15:03:13 stephena Exp $
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//============================================================================
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/**
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Code and cases to emulate each of the 6502 instruction
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Recompile with the following:
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'm4 M6502[Hi|Low].m4 M6502.m4 > M6502[Hi|Low].ins'
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@author Bradford W. Mott
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@version $Id: M6502.m4,v 1.7 2008-04-27 11:53:22 stephena Exp $
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@version $Id: M6502.m4,v 1.8 2009-04-20 15:03:13 stephena Exp $
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*/
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#ifndef NOTSAMEPAGE
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@ -28,28 +31,33 @@
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#endif
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define(M6502_ADC, `{
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uInt8 oldA = A;
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Int16 nonBCDSum = (Int16)A + (Int16)operand + (C ? 1 : 0);
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if(!D)
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{
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Int16 sum = (Int16)((Int8)A) + (Int16)((Int8)operand) + (C ? 1 : 0);
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V = ((sum > 127) || (sum < -128));
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Int32 sum = A + operand + (C ? 1 : 0);
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N = sum & 0x80;
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V = ~(A ^ operand) & (A ^ sum) & 0x80;
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notZ = sum & 0xff;
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C = sum & 0xff00;
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A = nonBCDSum;
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C = (nonBCDSum > 0xff);
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notZ = A;
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N = A & 0x80;
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A = (uInt8) sum;
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}
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else
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{
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Int16 sum = ourBCDTable[0][A] + ourBCDTable[0][operand] + (C ? 1 : 0);
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Int32 lo = (A & 0x0f) + (operand & 0x0f) + (C ? 1 : 0);
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Int32 hi = (A & 0xf0) + (operand & 0xf0);
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notZ = (lo+hi) & 0xff;
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if(lo > 0x09)
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{
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hi += 0x10;
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lo += 0x06;
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}
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N = hi & 0x80;
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V = ~(A ^ operand) & (A ^ hi) & 0x80;
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if(hi > 0x90)
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hi += 0x60;
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C = hi & 0xff00;
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notZ = nonBCDSum & 0xff; // Z flag calculation ignores D flag
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C = (sum > 99);
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A = ourBCDTable[1][sum & 0xff];
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N = A & 0x80;
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V = ((oldA ^ A) & 0x80) && ((A ^ operand) & 0x80);
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A = (lo & 0x0f) + (hi & 0xf0);
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}
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}')
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@ -273,35 +281,31 @@ define(M6502_ISB, `{
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operand = operand + 1;
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poke(operandAddress, operand);
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uInt8 oldA = A;
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// N, V, Z, C flags are the same in either mode (C calculated at the end)
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Int32 sum = A - operand - (C ? 0 : 1);
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N = sum & 0x80;
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V = (A ^ operand) & (A ^ sum) & 0x80;
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notZ = sum & 0xff;
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if(!D)
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{
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operand = ~operand;
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Int16 difference = (Int16)((Int8)A) + (Int16)((Int8)operand) + (C ? 1 : 0);
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V = ((difference > 127) || (difference < -128));
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difference = ((Int16)A) + ((Int16)operand) + (C ? 1 : 0);
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A = difference;
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C = (difference > 0xff);
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notZ = A;
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N = A & 0x80;
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A = (uInt8) sum;
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}
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else
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{
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Int16 difference = ourBCDTable[0][A] - ourBCDTable[0][operand]
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- (C ? 0 : 1);
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Int32 lo = (A & 0x0f) - (operand & 0x0f) - (C ? 0 : 1);
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Int32 hi = (A & 0xf0) - (operand & 0xf0);
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if(lo & 0x10)
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{
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lo -= 6;
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hi--;
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}
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if(hi & 0x0100)
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hi -= 0x60;
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if(difference < 0)
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difference += 100;
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A = ourBCDTable[1][difference];
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notZ = A;
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N = A & 0x80;
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C = (oldA >= (operand + (C ? 0 : 1)));
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V = ((oldA ^ A) & 0x80) && ((A ^ operand) & 0x80);
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A = (lo & 0x0f) | (hi & 0xf0);
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}
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C = (sum & 0xff00) == 0;
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}')
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define(M6502_JMP, `{
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@ -472,7 +476,6 @@ define(M6502_RORA, `{
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}')
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define(M6502_RRA, `{
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uInt8 oldA = A;
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bool oldC = C;
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// Set carry flag according to the right-most bit
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@ -483,24 +486,31 @@ define(M6502_RRA, `{
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if(!D)
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{
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Int16 sum = (Int16)((Int8)A) + (Int16)((Int8)operand) + (C ? 1 : 0);
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V = ((sum > 127) || (sum < -128));
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Int32 sum = A + operand + (C ? 1 : 0);
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N = sum & 0x80;
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V = ~(A ^ operand) & (A ^ sum) & 0x80;
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notZ = sum & 0xff;
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C = sum & 0xff00;
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sum = (Int16)A + (Int16)operand + (C ? 1 : 0);
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A = sum;
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C = (sum > 0xff);
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notZ = A;
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N = A & 0x80;
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A = (uInt8) sum;
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}
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else
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{
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Int16 sum = ourBCDTable[0][A] + ourBCDTable[0][operand] + (C ? 1 : 0);
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Int32 lo = (A & 0x0f) + (operand & 0x0f) + (C ? 1 : 0);
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Int32 hi = (A & 0xf0) + (operand & 0xf0);
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notZ = (lo+hi) & 0xff;
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if(lo > 0x09)
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{
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hi += 0x10;
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lo += 0x06;
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}
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N = hi & 0x80;
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V = ~(A ^ operand) & (A ^ hi) & 0x80;
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if(hi > 0x90)
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hi += 0x60;
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C = hi & 0xff00;
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C = (sum > 99);
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A = ourBCDTable[1][sum & 0xff];
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notZ = A;
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N = A & 0x80;
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V = ((oldA ^ A) & 0x80) && ((A ^ operand) & 0x80);
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A = (lo & 0x0f) + (hi & 0xf0);
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}
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}')
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@ -523,36 +533,31 @@ define(M6502_SAX, `{
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}')
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define(M6502_SBC, `{
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uInt8 oldA = A;
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// N, V, Z, C flags are the same in either mode (C calculated at the end)
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Int32 sum = A - operand - (C ? 0 : 1);
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N = sum & 0x80;
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V = (A ^ operand) & (A ^ sum) & 0x80;
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notZ = sum & 0xff;
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if(!D)
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{
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operand = ~operand;
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Int16 difference = (Int16)((Int8)A) + (Int16)((Int8)operand) + (C ? 1 : 0);
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V = ((difference > 127) || (difference < -128));
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difference = ((Int16)A) + ((Int16)operand) + (C ? 1 : 0);
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A = difference;
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C = (difference > 0xff);
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notZ = A;
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N = A & 0x80;
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A = (uInt8) sum;
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}
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else
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{
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Int16 difference = ourBCDTable[0][A] - ourBCDTable[0][operand]
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- (C ? 0 : 1);
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Int32 lo = (A & 0x0f) - (operand & 0x0f) - (C ? 0 : 1);
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Int32 hi = (A & 0xf0) - (operand & 0xf0);
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if(lo & 0x10)
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{
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lo -= 6;
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hi--;
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}
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if(hi & 0x0100)
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hi -= 0x60;
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if(difference < 0)
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difference += 100;
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// Z flag calculation ignores D flag
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notZ = (((Int16)A) + ((Int16)~operand) + (C ? 1 : 0)) & 0xff;
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A = ourBCDTable[1][difference];
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N = A & 0x80;
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C = (oldA >= (operand + (C ? 0 : 1)));
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V = ((oldA ^ A) & 0x80) && ((A ^ operand) & 0x80);
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A = (lo & 0x0f) | (hi & 0xf0);
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}
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C = (sum & 0xff00) == 0;
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}')
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define(M6502_SBX, `{
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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