From 14d1c17acc4dc888ddc5a93780c72ae7a830aac9 Mon Sep 17 00:00:00 2001 From: stephena Date: Sun, 7 Nov 2010 23:05:20 +0000 Subject: [PATCH] Re-arranged the bits in DisasmType to match their order of importance (ie, each bit now takes priority over ones with lower value). This doesn't change the processing in any way, but simply makes the bitstring more accurately reflect what's going on. git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@2174 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba --- src/debugger/CartDebug.hxx | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/debugger/CartDebug.hxx b/src/debugger/CartDebug.hxx index a6414a224..94554c1f8 100644 --- a/src/debugger/CartDebug.hxx +++ b/src/debugger/CartDebug.hxx @@ -63,14 +63,15 @@ class CartDebug : public DebuggerSystem i.e. LDA $F372 referenced $F372 */ // The following correspond to specific types that can be set within the - // debugger, or specified in a Distella cfg file + // debugger, or specified in a Distella cfg file, and are listed in order + // of decreasing hierarchy // - SKIP = 1 << 2, // TODO - document this - CODE = 1 << 3, // disassemble-able code segments - GFX = 1 << 4, // addresses loaded into GRPx registers - PGFX = 1 << 5, // addresses loaded into PFx registers - DATA = 1 << 6, // addresses loaded into registers other than GRPx / PFx - ROW = 1 << 7 // all other addresses + SKIP = 1 << 7, // TODO - document this + CODE = 1 << 6, // disassemble-able code segments + GFX = 1 << 5, // addresses loaded into GRPx registers + PGFX = 1 << 4, // addresses loaded into PFx registers + DATA = 1 << 3, // addresses loaded into registers other than GRPx / PFx + ROW = 1 << 2 // all other addresses }; struct DisassemblyTag { DisasmType type;