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Added Cart::patch support for all Superchip schemes as well as 

4A50 and FA.

Fixed bankcount for 3E carts to also consider the RAM slices.


git-svn-id: svn://svn.code.sf.net/p/stella/code/trunk@1978 8b62c5a3-ac7e-4cc8-8f21-d9a121418aba
This commit is contained in:
stephena 2010-03-28 16:01:31 +00:00
parent 6bea26cd95
commit 088e3e954f
8 changed files with 112 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/emucore/Cart3E.cxx
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@ -232,7 +232,9 @@ int Cartridge3E::bank()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
int Cartridge3E::bankCount()
{
return mySize >> 11;
// In addition to the number of 2K banks in ROM, there are 32 more 1K
// banks for RAM (doubled to 2K because of a read and write port)
return (mySize >> 11) + 32;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

2
src/emucore/Cart3E.hxx
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@ -172,7 +172,7 @@ class Cartridge3E : public Cartridge
uInt8* myImage;
// RAM contents. For now every ROM gets all 32K of potential RAM
uInt8 myRam[32768];
uInt8 myRam[32 * 1024];
// Size of the ROM image
uInt32 mySize;

31
src/emucore/Cart4A50.cxx
View File

@ -326,15 +326,40 @@ int Cartridge4A50::bank()
int Cartridge4A50::bankCount()
{
// Doesn't support bankswitching in the normal sense
// There is one 'virtual' bank that can change in many different ways
return 1;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool Cartridge4A50::patch(uInt16 address, uInt8 value)
{
// Doesn't support bankswitching in the normal sense
// TODO - add support for debugger
return false;
if((address & 0x1800) == 0x1000) // 2K region from 0x1000 - 0x17ff
{
if(myIsRomLow)
myImage[(address & 0x7ff) + mySliceLow] = value;
else
myRAM[(address & 0x7ff) + mySliceLow] = value;
}
else if(((address & 0x1fff) >= 0x1800) && // 1.5K region from 0x1800 - 0x1dff
((address & 0x1fff) <= 0x1dff))
{
if(myIsRomMiddle)
myImage[(address & 0x7ff) + mySliceMiddle + 0x10000] = value;
else
myRAM[(address & 0x7ff) + mySliceMiddle] = value;
}
else if((address & 0x1f00) == 0x1e00) // 256B region from 0x1e00 - 0x1eff
{
if(myIsRomHigh)
myImage[(address & 0xff) + mySliceHigh + 0x10000] = value;
else
myRAM[(address & 0xff) + mySliceHigh] = value;
}
else if((address & 0x1f00) == 0x1f00) // 256B region from 0x1f00 - 0x1fff
{
myImage[(address & 0xff) + 0x1ff00] = value;
}
return myBankChanged = true;
}
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

17
src/emucore/CartEFSC.cxx
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@ -176,7 +176,22 @@ int CartridgeEFSC::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeEFSC::patch(uInt16 address, uInt8 value)
{
myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;
return myBankChanged = true;
}

17
src/emucore/CartF4SC.cxx
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@ -179,7 +179,22 @@ int CartridgeF4SC::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeF4SC::patch(uInt16 address, uInt8 value)
{
myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;
return myBankChanged = true;
}

17
src/emucore/CartF6SC.cxx
View File

@ -222,7 +222,22 @@ int CartridgeF6SC::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeF6SC::patch(uInt16 address, uInt8 value)
{
myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;
return myBankChanged = true;
}

17
src/emucore/CartF8SC.cxx
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@ -202,7 +202,22 @@ int CartridgeF8SC::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeF8SC::patch(uInt16 address, uInt8 value)
{
myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
address &= 0x0FFF;
if(address < 0x0080)
{
myRAM[address] = value;
}
else if(address < 0x0100)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x80] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;
return myBankChanged = true;
}

17
src/emucore/CartFA.cxx
View File

@ -212,7 +212,22 @@ int CartridgeFA::bankCount()
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
bool CartridgeFA::patch(uInt16 address, uInt8 value)
{
myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value;
address &= 0x0FFF;
if(address < 0x0100)
{
myRAM[address] = value;
}
else if(address < 0x0200)
{
// Normally, a write to the read port won't do anything
// However, the patch command is special in that ignores such
// cart restrictions
myRAM[address - 0x100] = value;
}
else
myImage[(myCurrentBank << 12) + address] = value;
return myBankChanged = true;
}