diff --git a/src/emucore/Cart3E.cxx b/src/emucore/Cart3E.cxx index 90ef00731..ec9c52df1 100644 --- a/src/emucore/Cart3E.cxx +++ b/src/emucore/Cart3E.cxx @@ -232,7 +232,9 @@ int Cartridge3E::bank() // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - int Cartridge3E::bankCount() { - return mySize >> 11; + // In addition to the number of 2K banks in ROM, there are 32 more 1K + // banks for RAM (doubled to 2K because of a read and write port) + return (mySize >> 11) + 32; } // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/src/emucore/Cart3E.hxx b/src/emucore/Cart3E.hxx index a8d052857..5e50e307e 100644 --- a/src/emucore/Cart3E.hxx +++ b/src/emucore/Cart3E.hxx @@ -172,7 +172,7 @@ class Cartridge3E : public Cartridge uInt8* myImage; // RAM contents. For now every ROM gets all 32K of potential RAM - uInt8 myRam[32768]; + uInt8 myRam[32 * 1024]; // Size of the ROM image uInt32 mySize; diff --git a/src/emucore/Cart4A50.cxx b/src/emucore/Cart4A50.cxx index 291110cd1..583ed47de 100644 --- a/src/emucore/Cart4A50.cxx +++ b/src/emucore/Cart4A50.cxx @@ -326,15 +326,40 @@ int Cartridge4A50::bank() int Cartridge4A50::bankCount() { // Doesn't support bankswitching in the normal sense + // There is one 'virtual' bank that can change in many different ways return 1; } // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bool Cartridge4A50::patch(uInt16 address, uInt8 value) { - // Doesn't support bankswitching in the normal sense - // TODO - add support for debugger - return false; + if((address & 0x1800) == 0x1000) // 2K region from 0x1000 - 0x17ff + { + if(myIsRomLow) + myImage[(address & 0x7ff) + mySliceLow] = value; + else + myRAM[(address & 0x7ff) + mySliceLow] = value; + } + else if(((address & 0x1fff) >= 0x1800) && // 1.5K region from 0x1800 - 0x1dff + ((address & 0x1fff) <= 0x1dff)) + { + if(myIsRomMiddle) + myImage[(address & 0x7ff) + mySliceMiddle + 0x10000] = value; + else + myRAM[(address & 0x7ff) + mySliceMiddle] = value; + } + else if((address & 0x1f00) == 0x1e00) // 256B region from 0x1e00 - 0x1eff + { + if(myIsRomHigh) + myImage[(address & 0xff) + mySliceHigh + 0x10000] = value; + else + myRAM[(address & 0xff) + mySliceHigh] = value; + } + else if((address & 0x1f00) == 0x1f00) // 256B region from 0x1f00 - 0x1fff + { + myImage[(address & 0xff) + 0x1ff00] = value; + } + return myBankChanged = true; } // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/src/emucore/CartEFSC.cxx b/src/emucore/CartEFSC.cxx index 8424bb7da..06e1eef82 100644 --- a/src/emucore/CartEFSC.cxx +++ b/src/emucore/CartEFSC.cxx @@ -176,7 +176,22 @@ int CartridgeEFSC::bankCount() // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bool CartridgeEFSC::patch(uInt16 address, uInt8 value) { - myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value; + address &= 0x0FFF; + + if(address < 0x0080) + { + myRAM[address] = value; + } + else if(address < 0x0100) + { + // Normally, a write to the read port won't do anything + // However, the patch command is special in that ignores such + // cart restrictions + myRAM[address - 0x80] = value; + } + else + myImage[(myCurrentBank << 12) + address] = value; + return myBankChanged = true; } diff --git a/src/emucore/CartF4SC.cxx b/src/emucore/CartF4SC.cxx index 4dd49fd87..de57c01cd 100644 --- a/src/emucore/CartF4SC.cxx +++ b/src/emucore/CartF4SC.cxx @@ -179,7 +179,22 @@ int CartridgeF4SC::bankCount() // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bool CartridgeF4SC::patch(uInt16 address, uInt8 value) { - myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value; + address &= 0x0FFF; + + if(address < 0x0080) + { + myRAM[address] = value; + } + else if(address < 0x0100) + { + // Normally, a write to the read port won't do anything + // However, the patch command is special in that ignores such + // cart restrictions + myRAM[address - 0x80] = value; + } + else + myImage[(myCurrentBank << 12) + address] = value; + return myBankChanged = true; } diff --git a/src/emucore/CartF6SC.cxx b/src/emucore/CartF6SC.cxx index 50ab59325..84c2b0c99 100644 --- a/src/emucore/CartF6SC.cxx +++ b/src/emucore/CartF6SC.cxx @@ -222,7 +222,22 @@ int CartridgeF6SC::bankCount() // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bool CartridgeF6SC::patch(uInt16 address, uInt8 value) { - myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value; + address &= 0x0FFF; + + if(address < 0x0080) + { + myRAM[address] = value; + } + else if(address < 0x0100) + { + // Normally, a write to the read port won't do anything + // However, the patch command is special in that ignores such + // cart restrictions + myRAM[address - 0x80] = value; + } + else + myImage[(myCurrentBank << 12) + address] = value; + return myBankChanged = true; } diff --git a/src/emucore/CartF8SC.cxx b/src/emucore/CartF8SC.cxx index e282b19f7..f67a6ec5f 100644 --- a/src/emucore/CartF8SC.cxx +++ b/src/emucore/CartF8SC.cxx @@ -202,7 +202,22 @@ int CartridgeF8SC::bankCount() // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bool CartridgeF8SC::patch(uInt16 address, uInt8 value) { - myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value; + address &= 0x0FFF; + + if(address < 0x0080) + { + myRAM[address] = value; + } + else if(address < 0x0100) + { + // Normally, a write to the read port won't do anything + // However, the patch command is special in that ignores such + // cart restrictions + myRAM[address - 0x80] = value; + } + else + myImage[(myCurrentBank << 12) + address] = value; + return myBankChanged = true; } diff --git a/src/emucore/CartFA.cxx b/src/emucore/CartFA.cxx index 08cd7f3dc..e88d97dc9 100644 --- a/src/emucore/CartFA.cxx +++ b/src/emucore/CartFA.cxx @@ -212,7 +212,22 @@ int CartridgeFA::bankCount() // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - bool CartridgeFA::patch(uInt16 address, uInt8 value) { - myImage[(myCurrentBank << 12) + (address & 0x0FFF)] = value; + address &= 0x0FFF; + + if(address < 0x0100) + { + myRAM[address] = value; + } + else if(address < 0x0200) + { + // Normally, a write to the read port won't do anything + // However, the patch command is special in that ignores such + // cart restrictions + myRAM[address - 0x100] = value; + } + else + myImage[(myCurrentBank << 12) + address] = value; + return myBankChanged = true; }