2012-01-21 13:11:08 +00:00
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//============================================================================
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//
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2016-12-30 00:00:30 +00:00
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// SSSS tt lll lll
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// SS SS tt ll ll
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// SS tttttt eeee ll ll aaaa
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2012-01-21 13:11:08 +00:00
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// SSSS tt ee ee ll ll aa
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// SS tt eeeeee ll ll aaaaa -- "An Atari 2600 VCS Emulator"
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// SS SS tt ee ll ll aa aa
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// SSSS ttt eeeee llll llll aaaaa
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//
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2017-12-29 20:40:37 +00:00
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// Copyright (c) 1995-2018 by Bradford W. Mott, Stephen Anthony
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2012-01-21 13:11:08 +00:00
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// and the Stella Team
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//
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// See the file "License.txt" for information on usage and redistribution of
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// this file, and for a DISCLAIMER OF ALL WARRANTIES.
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//============================================================================
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2012-04-14 19:28:53 +00:00
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#include "OSystem.hxx"
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2012-04-12 23:23:12 +00:00
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#include "Serializer.hxx"
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2012-01-21 13:11:08 +00:00
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#include "System.hxx"
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#include "CartFA2.hxx"
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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2017-07-02 21:57:27 +00:00
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CartridgeFA2::CartridgeFA2(const BytePtr& image, uInt32 size,
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2018-12-18 13:54:40 +00:00
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const string& md5, const OSystem& osystem)
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: Cartridge(osystem.settings(), md5),
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2012-04-14 19:28:53 +00:00
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myOSystem(osystem),
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2015-12-09 17:08:52 +00:00
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mySize(28 * 1024),
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2012-04-14 19:28:53 +00:00
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myRamAccessTimeout(0),
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2017-08-31 18:01:27 +00:00
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myBankOffset(0)
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2012-01-21 13:11:08 +00:00
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{
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2013-02-20 18:16:34 +00:00
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// 29/32K version of FA2 has valid data @ 1K - 29K
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2017-07-02 21:57:27 +00:00
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const uInt8* img_ptr = image.get();
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2013-02-20 18:16:34 +00:00
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if(size >= 29 * 1024)
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2017-07-02 21:57:27 +00:00
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img_ptr += 1024;
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2015-12-09 17:08:52 +00:00
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else if(size < mySize)
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mySize = size;
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2013-02-20 18:16:34 +00:00
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2012-01-21 13:11:08 +00:00
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// Copy the ROM image into my buffer
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2017-07-02 21:57:27 +00:00
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memcpy(myImage, img_ptr, mySize);
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2012-03-29 19:03:58 +00:00
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createCodeAccessBase(mySize);
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2012-01-21 13:11:08 +00:00
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}
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2015-12-04 19:08:14 +00:00
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2012-01-21 13:11:08 +00:00
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeFA2::reset()
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{
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2016-08-24 23:57:07 +00:00
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initializeRAM(myRAM, 256);
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2018-09-14 23:27:36 +00:00
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initializeStartBank();
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2012-01-21 13:11:08 +00:00
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// Upon reset we switch to the startup bank
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2018-09-14 23:27:36 +00:00
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bank(startBank());
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2012-01-21 13:11:08 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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void CartridgeFA2::install(System& system)
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{
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mySystem = &system;
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2014-07-24 16:24:27 +00:00
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System::PageAccess access(this, System::PA_READ);
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2012-01-21 13:11:08 +00:00
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// Set the page accessing method for the RAM writing pages
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2018-12-18 00:55:08 +00:00
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// Map access to this class, since we need to inspect all accesses to
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// check if RWP happens
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2012-01-21 13:11:08 +00:00
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access.type = System::PA_WRITE;
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2017-09-16 01:58:20 +00:00
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for(uInt16 addr = 0x1000; addr < 0x1100; addr += System::PAGE_SIZE)
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2012-01-21 13:11:08 +00:00
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{
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2017-09-16 01:58:20 +00:00
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access.codeAccessBase = &myCodeAccessBase[addr & 0x00FF];
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mySystem->setPageAccess(addr, access);
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2012-01-21 13:11:08 +00:00
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}
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2015-12-04 19:08:14 +00:00
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2012-01-21 13:11:08 +00:00
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// Set the page accessing method for the RAM reading pages
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2017-10-11 14:53:54 +00:00
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access.directPokeBase = nullptr;
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2012-01-21 13:11:08 +00:00
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access.type = System::PA_READ;
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2017-09-16 01:58:20 +00:00
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for(uInt16 addr = 0x1100; addr < 0x1200; addr += System::PAGE_SIZE)
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2012-01-21 13:11:08 +00:00
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{
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2017-09-16 01:58:20 +00:00
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access.directPeekBase = &myRAM[addr & 0x00FF];
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access.codeAccessBase = &myCodeAccessBase[0x100 + (addr & 0x00FF)];
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mySystem->setPageAccess(addr, access);
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2012-01-21 13:11:08 +00:00
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}
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// Install pages for the startup bank
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2018-09-14 23:27:36 +00:00
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bank(startBank());
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2012-01-21 13:11:08 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt8 CartridgeFA2::peek(uInt16 address)
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{
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uInt16 peekAddress = address;
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address &= 0x0FFF;
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// Switch banks if necessary
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switch(address)
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{
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2012-04-12 23:23:12 +00:00
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case 0x0FF4:
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// Load/save RAM to/from Harmony cart flash
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if(mySize == 28*1024 && !bankLocked())
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return ramReadWrite();
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break;
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2012-01-21 13:11:08 +00:00
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case 0x0FF5:
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// Set the current bank to the first 4k bank
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bank(0);
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break;
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case 0x0FF6:
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// Set the current bank to the second 4k bank
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bank(1);
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break;
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case 0x0FF7:
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// Set the current bank to the third 4k bank
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bank(2);
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break;
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2016-12-30 00:00:30 +00:00
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2012-01-21 13:11:08 +00:00
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case 0x0FF8:
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// Set the current bank to the fourth 4k bank
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bank(3);
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break;
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case 0x0FF9:
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// Set the current bank to the fifth 4k bank
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bank(4);
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break;
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case 0x0FFA:
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// Set the current bank to the sixth 4k bank
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bank(5);
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break;
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2012-03-29 19:03:58 +00:00
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case 0x0FFB:
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// Set the current bank to the seventh 4k bank
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// This is only available on 28K ROMs
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if(mySize == 28*1024) bank(6);
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break;
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2012-01-21 13:11:08 +00:00
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default:
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break;
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}
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2018-12-08 01:15:28 +00:00
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if(address < 0x0100) // Write port is at 0xF000 - 0xF0FF (256 bytes)
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2018-12-18 00:55:08 +00:00
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return peekRAM(myRAM[address], peekAddress);
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2012-01-21 13:11:08 +00:00
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else
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2017-08-31 18:01:27 +00:00
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return myImage[myBankOffset + address];
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2012-01-21 13:11:08 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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2018-12-18 00:55:08 +00:00
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bool CartridgeFA2::poke(uInt16 address, uInt8 value)
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2012-01-21 13:11:08 +00:00
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{
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// Switch banks if necessary
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2018-12-18 00:55:08 +00:00
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switch(address & 0x0FFF)
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2012-01-21 13:11:08 +00:00
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{
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2012-04-12 23:23:12 +00:00
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case 0x0FF4:
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// Load/save RAM to/from Harmony cart flash
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if(mySize == 28*1024 && !bankLocked())
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ramReadWrite();
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2018-12-18 00:55:08 +00:00
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return false;
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2012-04-12 23:23:12 +00:00
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2012-01-21 13:11:08 +00:00
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case 0x0FF5:
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// Set the current bank to the first 4k bank
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bank(0);
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2018-12-18 00:55:08 +00:00
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return false;
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2012-01-21 13:11:08 +00:00
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case 0x0FF6:
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// Set the current bank to the second 4k bank
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bank(1);
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2018-12-18 00:55:08 +00:00
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return false;
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2012-01-21 13:11:08 +00:00
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case 0x0FF7:
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// Set the current bank to the third 4k bank
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bank(2);
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2018-12-18 00:55:08 +00:00
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return false;
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2016-12-30 00:00:30 +00:00
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2012-01-21 13:11:08 +00:00
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case 0x0FF8:
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// Set the current bank to the fourth 4k bank
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bank(3);
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2018-12-18 00:55:08 +00:00
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return false;
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2012-01-21 13:11:08 +00:00
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case 0x0FF9:
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// Set the current bank to the fifth 4k bank
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bank(4);
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2018-12-18 00:55:08 +00:00
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return false;
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2012-01-21 13:11:08 +00:00
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case 0x0FFA:
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// Set the current bank to the sixth 4k bank
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bank(5);
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2018-12-18 00:55:08 +00:00
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return false;
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2012-01-21 13:11:08 +00:00
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2012-03-29 19:03:58 +00:00
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case 0x0FFB:
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// Set the current bank to the seventh 4k bank
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// This is only available on 28K ROMs
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if(mySize == 28*1024) bank(6);
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2018-12-18 00:55:08 +00:00
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return false;
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2012-03-29 19:03:58 +00:00
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2012-01-21 13:11:08 +00:00
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default:
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break;
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}
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2018-12-18 00:55:08 +00:00
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pokeRAM(myRAM[address & 0x00FF], address, value);
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return true;
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2012-01-21 13:11:08 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeFA2::bank(uInt16 bank)
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{
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if(bankLocked()) return false;
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// Remember what bank we're in
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2017-08-31 18:01:27 +00:00
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myBankOffset = bank << 12;
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2012-01-21 13:11:08 +00:00
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2014-07-24 16:24:27 +00:00
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System::PageAccess access(this, System::PA_READ);
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2012-01-21 13:11:08 +00:00
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// Set the page accessing methods for the hot spots
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2017-09-16 01:58:20 +00:00
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for(uInt16 addr = (0x1FF4 & ~System::PAGE_MASK); addr < 0x2000;
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addr += System::PAGE_SIZE)
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2012-01-21 13:11:08 +00:00
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{
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2017-09-16 01:58:20 +00:00
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access.codeAccessBase = &myCodeAccessBase[myBankOffset + (addr & 0x0FFF)];
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mySystem->setPageAccess(addr, access);
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2012-01-21 13:11:08 +00:00
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}
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// Setup the page access methods for the current bank
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2017-09-16 01:58:20 +00:00
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for(uInt16 addr = 0x1200; addr < (0x1FF4U & ~System::PAGE_MASK);
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addr += System::PAGE_SIZE)
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2012-01-21 13:11:08 +00:00
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{
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2017-09-16 01:58:20 +00:00
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access.directPeekBase = &myImage[myBankOffset + (addr & 0x0FFF)];
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access.codeAccessBase = &myCodeAccessBase[myBankOffset + (addr & 0x0FFF)];
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mySystem->setPageAccess(addr, access);
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2012-01-21 13:11:08 +00:00
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}
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return myBankChanged = true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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2014-07-28 13:40:37 +00:00
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uInt16 CartridgeFA2::getBank() const
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2012-01-21 13:11:08 +00:00
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{
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2017-08-31 18:01:27 +00:00
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return myBankOffset >> 12;
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2012-01-21 13:11:08 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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uInt16 CartridgeFA2::bankCount() const
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{
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2012-03-29 19:03:58 +00:00
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return (mySize / 4096);
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2012-01-21 13:11:08 +00:00
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeFA2::patch(uInt16 address, uInt8 value)
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{
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address &= 0x0FFF;
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if(address < 0x0200)
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{
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// Normally, a write to the read port won't do anything
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// However, the patch command is special in that ignores such
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// cart restrictions
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myRAM[address & 0x00FF] = value;
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}
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else
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2017-08-31 18:01:27 +00:00
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myImage[myBankOffset + address] = value;
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2012-01-21 13:11:08 +00:00
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return myBankChanged = true;
|
2016-01-23 18:16:09 +00:00
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}
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2012-01-21 13:11:08 +00:00
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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2017-09-01 12:53:17 +00:00
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const uInt8* CartridgeFA2::getImage(uInt32& size) const
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2012-01-21 13:11:08 +00:00
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{
|
2012-03-29 19:03:58 +00:00
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size = mySize;
|
2012-01-21 13:11:08 +00:00
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return myImage;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeFA2::save(Serializer& out) const
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{
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try
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{
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2017-08-31 18:01:27 +00:00
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out.putShort(myBankOffset);
|
2012-05-20 14:23:48 +00:00
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out.putByteArray(myRAM, 256);
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2012-01-21 13:11:08 +00:00
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}
|
2012-05-25 12:41:19 +00:00
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catch(...)
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2012-01-21 13:11:08 +00:00
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{
|
2012-05-25 12:41:19 +00:00
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cerr << "ERROR: CartridgeFA2::save" << endl;
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2012-01-21 13:11:08 +00:00
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return false;
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}
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return true;
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}
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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bool CartridgeFA2::load(Serializer& in)
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{
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try
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{
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2017-08-31 18:01:27 +00:00
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myBankOffset = in.getShort();
|
2012-05-20 14:23:48 +00:00
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|
|
in.getByteArray(myRAM, 256);
|
2012-01-21 13:11:08 +00:00
|
|
|
}
|
2012-05-25 12:41:19 +00:00
|
|
|
catch(...)
|
2012-01-21 13:11:08 +00:00
|
|
|
{
|
2012-05-25 12:41:19 +00:00
|
|
|
cerr << "ERROR: CartridgeFA2::load" << endl;
|
2012-01-21 13:11:08 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Remember what bank we were in
|
2017-08-31 18:01:27 +00:00
|
|
|
bank(myBankOffset >> 12);
|
2012-01-21 13:11:08 +00:00
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
2012-04-12 23:23:12 +00:00
|
|
|
|
2012-04-14 19:28:53 +00:00
|
|
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
|
|
|
void CartridgeFA2::setRomName(const string& name)
|
|
|
|
{
|
2013-02-17 00:19:14 +00:00
|
|
|
myFlashFile = myOSystem.nvramDir() + name + "_flash.dat";
|
2012-04-14 19:28:53 +00:00
|
|
|
}
|
|
|
|
|
2012-04-12 23:23:12 +00:00
|
|
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
|
|
|
uInt8 CartridgeFA2::ramReadWrite()
|
|
|
|
{
|
|
|
|
/* The following algorithm implements accessing Harmony cart flash
|
|
|
|
|
2012-04-14 19:28:53 +00:00
|
|
|
1. Wait for an access to hotspot location $1FF4 (return 1 in bit 6
|
|
|
|
while busy).
|
2012-04-12 23:23:12 +00:00
|
|
|
|
|
|
|
2. Read byte 256 of RAM+ memory to determine the operation requested
|
|
|
|
(1 = read, 2 = write).
|
|
|
|
|
|
|
|
3. Save or load the entire 256 bytes of RAM+ memory to a file.
|
|
|
|
|
2012-04-14 19:28:53 +00:00
|
|
|
4. Set byte 256 of RAM+ memory to zero to indicate success (will
|
|
|
|
always happen in emulation).
|
2012-04-12 23:23:12 +00:00
|
|
|
|
2012-04-14 19:28:53 +00:00
|
|
|
5. Return 0 (in bit 6) on the next access to $1FF4, if enough time has
|
|
|
|
passed to complete the operation on a real system (0.5 ms for read,
|
|
|
|
101 ms for write).
|
2012-04-12 23:23:12 +00:00
|
|
|
*/
|
2012-04-14 19:28:53 +00:00
|
|
|
|
|
|
|
// First access sets the timer
|
|
|
|
if(myRamAccessTimeout == 0)
|
2012-04-12 23:23:12 +00:00
|
|
|
{
|
2012-04-14 19:28:53 +00:00
|
|
|
// Remember when the first access was made
|
|
|
|
myRamAccessTimeout = myOSystem.getTicks();
|
|
|
|
|
|
|
|
// We go ahead and do the access now, and only return when a sufficient
|
|
|
|
// amount of time has passed
|
2012-04-12 23:23:12 +00:00
|
|
|
Serializer serializer(myFlashFile);
|
2015-07-11 22:03:12 +00:00
|
|
|
if(serializer)
|
2012-04-12 23:23:12 +00:00
|
|
|
{
|
|
|
|
if(myRAM[255] == 1) // read
|
|
|
|
{
|
|
|
|
try
|
|
|
|
{
|
2012-05-20 14:23:48 +00:00
|
|
|
serializer.getByteArray(myRAM, 256);
|
2012-04-12 23:23:12 +00:00
|
|
|
}
|
2012-05-25 12:41:19 +00:00
|
|
|
catch(...)
|
2012-04-12 23:23:12 +00:00
|
|
|
{
|
|
|
|
memset(myRAM, 0, 256);
|
|
|
|
}
|
2012-04-14 19:28:53 +00:00
|
|
|
myRamAccessTimeout += 500; // Add 0.5 ms delay for read
|
2012-04-12 23:23:12 +00:00
|
|
|
}
|
|
|
|
else if(myRAM[255] == 2) // write
|
|
|
|
{
|
|
|
|
try
|
|
|
|
{
|
2012-05-20 14:23:48 +00:00
|
|
|
serializer.putByteArray(myRAM, 256);
|
2012-04-12 23:23:12 +00:00
|
|
|
}
|
2012-05-25 12:41:19 +00:00
|
|
|
catch(...)
|
2012-04-12 23:23:12 +00:00
|
|
|
{
|
2012-04-14 19:28:53 +00:00
|
|
|
// Maybe add logging here that save failed?
|
2012-05-25 12:41:19 +00:00
|
|
|
cerr << name() << ": ERROR saving score table" << endl;
|
2012-04-12 23:23:12 +00:00
|
|
|
}
|
2012-04-14 19:28:53 +00:00
|
|
|
myRamAccessTimeout += 101000; // Add 101 ms delay for write
|
2012-04-12 23:23:12 +00:00
|
|
|
}
|
|
|
|
}
|
2012-04-14 19:28:53 +00:00
|
|
|
// Bit 6 is 1, busy
|
2017-08-31 18:01:27 +00:00
|
|
|
return myImage[myBankOffset + 0xFF4] | 0x40;
|
2012-04-12 23:23:12 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2012-04-14 19:28:53 +00:00
|
|
|
// Have we reached the timeout value yet?
|
|
|
|
if(myOSystem.getTicks() >= myRamAccessTimeout)
|
|
|
|
{
|
|
|
|
myRamAccessTimeout = 0; // Turn off timer
|
|
|
|
myRAM[255] = 0; // Successful operation
|
|
|
|
|
|
|
|
// Bit 6 is 0, ready/success
|
2017-08-31 18:01:27 +00:00
|
|
|
return myImage[myBankOffset + 0xFF4] & ~0x40;
|
2012-04-14 19:28:53 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
// Bit 6 is 1, busy
|
2017-08-31 18:01:27 +00:00
|
|
|
return myImage[myBankOffset + 0xFF4] | 0x40;
|
2012-04-12 23:23:12 +00:00
|
|
|
}
|
|
|
|
}
|
2013-04-17 22:32:49 +00:00
|
|
|
|
|
|
|
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
|
|
|
|
void CartridgeFA2::flash(uInt8 operation)
|
|
|
|
{
|
|
|
|
Serializer serializer(myFlashFile);
|
2015-07-11 22:03:12 +00:00
|
|
|
if(serializer)
|
2013-04-17 22:32:49 +00:00
|
|
|
{
|
|
|
|
if(operation == 0) // erase
|
|
|
|
{
|
|
|
|
try
|
|
|
|
{
|
|
|
|
uInt8 buf[256];
|
|
|
|
memset(buf, 0, 256);
|
|
|
|
serializer.putByteArray(buf, 256);
|
|
|
|
}
|
|
|
|
catch(...)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if(operation == 1) // read
|
|
|
|
{
|
|
|
|
try
|
|
|
|
{
|
|
|
|
serializer.getByteArray(myRAM, 256);
|
|
|
|
}
|
|
|
|
catch(...)
|
|
|
|
{
|
|
|
|
memset(myRAM, 0, 256);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else if(operation == 2) // write
|
|
|
|
{
|
|
|
|
try
|
|
|
|
{
|
|
|
|
serializer.putByteArray(myRAM, 256);
|
|
|
|
}
|
|
|
|
catch(...)
|
|
|
|
{
|
|
|
|
// Maybe add logging here that save failed?
|
|
|
|
cerr << name() << ": ERROR saving score table" << endl;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|