mirror of https://github.com/snes9xgit/snes9x.git
206 lines
4.3 KiB
Brainfuck
206 lines
4.3 KiB
Brainfuck
adc_a_const(0x88, adc, a),
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and_a_const(0x28, and, a),
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cmp_a_const(0x68, cmp, a),
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cmp_x_const(0xc8, cmp, x),
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cmp_y_const(0xad, cmp, y),
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eor_a_const(0x48, eor, a),
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or_a_const(0x08, or, a),
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sbc_a_const(0xa8, sbc, a) {
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1:rd = op_readpc();
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regs.$2 = op_$1(regs.$2, rd);
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}
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adc_a_ix(0x86, adc),
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and_a_ix(0x26, and),
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cmp_a_ix(0x66, cmp),
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eor_a_ix(0x46, eor),
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or_a_ix(0x06, or),
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sbc_a_ix(0xa6, sbc) {
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1:op_io();
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2:rd = op_readdp(regs.x);
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regs.a = op_$1(regs.a, rd);
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}
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adc_a_dp(0x84, adc, a),
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and_a_dp(0x24, and, a),
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cmp_a_dp(0x64, cmp, a),
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cmp_x_dp(0x3e, cmp, x),
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cmp_y_dp(0x7e, cmp, y),
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eor_a_dp(0x44, eor, a),
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or_a_dp(0x04, or, a),
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sbc_a_dp(0xa4, sbc, a) {
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1:dp = op_readpc();
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2:rd = op_readdp(dp);
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regs.$2 = op_$1(regs.$2, rd);
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}
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adc_a_dpx(0x94, adc),
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and_a_dpx(0x34, and),
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cmp_a_dpx(0x74, cmp),
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eor_a_dpx(0x54, eor),
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or_a_dpx(0x14, or),
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sbc_a_dpx(0xb4, sbc) {
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1:dp = op_readpc();
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2:op_io();
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3:rd = op_readdp(dp + regs.x);
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regs.a = op_$1(regs.a, rd);
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}
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adc_a_addr(0x85, adc, a),
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and_a_addr(0x25, and, a),
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cmp_a_addr(0x65, cmp, a),
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cmp_x_addr(0x1e, cmp, x),
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cmp_y_addr(0x5e, cmp, y),
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eor_a_addr(0x45, eor, a),
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or_a_addr(0x05, or, a),
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sbc_a_addr(0xa5, sbc, a) {
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1:dp = op_readpc();
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2:dp |= op_readpc() << 8;
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3:rd = op_readaddr(dp);
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regs.$2 = op_$1(regs.$2, rd);
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}
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adc_a_addrx(0x95, adc, x),
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adc_a_addry(0x96, adc, y),
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and_a_addrx(0x35, and, x),
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and_a_addry(0x36, and, y),
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cmp_a_addrx(0x75, cmp, x),
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cmp_a_addry(0x76, cmp, y),
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eor_a_addrx(0x55, eor, x),
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eor_a_addry(0x56, eor, y),
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or_a_addrx(0x15, or, x),
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or_a_addry(0x16, or, y),
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sbc_a_addrx(0xb5, sbc, x),
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sbc_a_addry(0xb6, sbc, y) {
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1:dp = op_readpc();
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2:dp |= op_readpc() << 8;
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3:op_io();
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4:rd = op_readaddr(dp + regs.$2);
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regs.a = op_$1(regs.a, rd);
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}
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adc_a_idpx(0x87, adc),
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and_a_idpx(0x27, and),
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cmp_a_idpx(0x67, cmp),
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eor_a_idpx(0x47, eor),
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or_a_idpx(0x07, or),
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sbc_a_idpx(0xa7, sbc) {
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1:dp = op_readpc() + regs.x;
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2:op_io();
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3:sp = op_readdp(dp);
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4:sp |= op_readdp(dp + 1) << 8;
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5:rd = op_readaddr(sp);
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regs.a = op_$1(regs.a, rd);
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}
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adc_a_idpy(0x97, adc),
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and_a_idpy(0x37, and),
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cmp_a_idpy(0x77, cmp),
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eor_a_idpy(0x57, eor),
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or_a_idpy(0x17, or),
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sbc_a_idpy(0xb7, sbc) {
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1:dp = op_readpc();
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2:op_io();
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3:sp = op_readdp(dp);
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4:sp |= op_readdp(dp + 1) << 8;
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5:rd = op_readaddr(sp + regs.y);
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regs.a = op_$1(regs.a, rd);
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}
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adc_ix_iy(0x99, adc, 1),
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and_ix_iy(0x39, and, 1),
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cmp_ix_iy(0x79, cmp, 0),
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eor_ix_iy(0x59, eor, 1),
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or_ix_iy(0x19, or, 1),
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sbc_ix_iy(0xb9, sbc, 1) {
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1:op_io();
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2:rd = op_readdp(regs.y);
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3:wr = op_readdp(regs.x);
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wr = op_$1(wr, rd);
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4:($2) ? op_writedp(regs.x, wr) : op_io();
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}
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adc_dp_dp(0x89, adc, 1),
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and_dp_dp(0x29, and, 1),
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cmp_dp_dp(0x69, cmp, 0),
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eor_dp_dp(0x49, eor, 1),
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or_dp_dp(0x09, or, 1),
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sbc_dp_dp(0xa9, sbc, 1) {
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1:sp = op_readpc();
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2:rd = op_readdp(sp);
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3:dp = op_readpc();
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4:wr = op_readdp(dp);
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5:wr = op_$1(wr, rd);
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($2) ? op_writedp(dp, wr) : op_io();
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}
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adc_dp_const(0x98, adc, 1),
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and_dp_const(0x38, and, 1),
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cmp_dp_const(0x78, cmp, 0),
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eor_dp_const(0x58, eor, 1),
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or_dp_const(0x18, or, 1),
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sbc_dp_const(0xb8, sbc, 1) {
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1:rd = op_readpc();
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2:dp = op_readpc();
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3:wr = op_readdp(dp);
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4:wr = op_$1(wr, rd);
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($2) ? op_writedp(dp, wr) : op_io();
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}
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addw_ya_dp(0x7a, addw),
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subw_ya_dp(0x9a, subw) {
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1:dp = op_readpc();
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2:rd = op_readdp(dp);
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3:op_io();
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4:rd |= op_readdp(dp + 1) << 8;
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regs.ya = op_$1(regs.ya, rd);
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}
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cmpw_ya_dp(0x5a) {
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1:dp = op_readpc();
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2:rd = op_readdp(dp);
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3:rd |= op_readdp(dp + 1) << 8;
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op_cmpw(regs.ya, rd);
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}
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and1_bit(0x4a, !!),
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and1_notbit(0x6a, !) {
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1:dp = op_readpc();
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2:dp |= op_readpc() << 8;
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3:bit = dp >> 13;
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dp &= 0x1fff;
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rd = op_readaddr(dp);
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regs.p.c = regs.p.c & $1(rd & (1 << bit));
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}
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eor1_bit(0x8a) {
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1:dp = op_readpc();
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2:dp |= op_readpc() << 8;
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3:bit = dp >> 13;
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dp &= 0x1fff;
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rd = op_readaddr(dp);
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4:op_io();
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regs.p.c = regs.p.c ^ !!(rd & (1 << bit));
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}
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not1_bit(0xea) {
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1:dp = op_readpc();
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2:dp |= op_readpc() << 8;
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3:bit = dp >> 13;
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dp &= 0x1fff;
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rd = op_readaddr(dp);
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rd ^= (1 << bit);
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4:op_writeaddr(dp, rd);
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}
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or1_bit(0x0a, !!),
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or1_notbit(0x2a, !) {
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1:dp = op_readpc();
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2:dp |= op_readpc() << 8;
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3:bit = dp >> 13;
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dp &= 0x1fff;
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rd = op_readaddr(dp);
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4:op_io();
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regs.p.c = regs.p.c | $1(rd & (1 << bit));
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}
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