mirror of https://github.com/snes9xgit/snes9x.git
143 lines
3.8 KiB
C++
143 lines
3.8 KiB
C++
// SPC emulation state save/load: copy_state(), save_spc()
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// Separate file to avoid linking in unless needed
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// snes_spc 0.9.0. http://www.slack.net/‾ant/
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#include "SNES_SPC.h"
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#if !SPC_NO_COPY_STATE_FUNCS
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#include <string.h>
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/* Copyright (C) 2004-2007 Shay Green. This module is free software; you
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can redistribute it and/or modify it under the terms of the GNU Lesser
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General Public License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version. This
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module is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
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details. You should have received a copy of the GNU Lesser General Public
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License along with this module; if not, write to the Free Software Foundation,
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Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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#include <stdio.h>
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#include "blargg_source.h"
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#define RAM (m.ram.ram)
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#define REGS (m.smp_regs [0])
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#define REGS_IN (m.smp_regs [1])
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void SNES_SPC::save_regs( uint8_t out [reg_count] )
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{
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// Use current timer counter values
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for ( int i = 0; i < timer_count; i++ )
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out [r_t0out + i] = m.timers [i].counter;
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// Last written values
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memcpy( out, REGS, r_t0out );
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}
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void SNES_SPC::init_header( void* spc_out )
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{
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spc_file_t* const spc = (spc_file_t*) spc_out;
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spc->has_id666 = 26; // has none
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spc->version = 30;
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memcpy( spc, signature, sizeof spc->signature );
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memset( spc->text, 0, sizeof spc->text );
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}
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void SNES_SPC::save_spc( void* spc_out )
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{
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spc_file_t* const spc = (spc_file_t*) spc_out;
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// CPU
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spc->pcl = (uint8_t) (m.cpu_regs.pc >> 0);
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spc->pch = (uint8_t) (m.cpu_regs.pc >> 8);
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spc->a = m.cpu_regs.a;
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spc->x = m.cpu_regs.x;
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spc->y = m.cpu_regs.y;
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spc->psw = m.cpu_regs.psw;
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spc->sp = m.cpu_regs.sp;
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// RAM, ROM
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memcpy( spc->ram, RAM, sizeof spc->ram );
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if ( m.rom_enabled )
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memcpy( spc->ram + rom_addr, m.hi_ram, sizeof m.hi_ram );
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memset( spc->unused, 0, sizeof spc->unused );
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memcpy( spc->ipl_rom, m.rom, sizeof spc->ipl_rom );
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// SMP registers
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save_regs( &spc->ram [0xF0] );
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int i;
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for ( i = 0; i < port_count; i++ )
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spc->ram [0xF0 + r_cpuio0 + i] = REGS_IN [r_cpuio0 + i];
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// DSP registers
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for ( i = 0; i < SPC_DSP::register_count; i++ )
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spc->dsp [i] = dsp.read( i );
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}
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#undef IF_0_THEN_256
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#define IF_0_THEN_256( n ) ((uint8_t) ((n) - 1) + 1)
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void SNES_SPC::copy_state( unsigned char** io, copy_func_t copy )
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{
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SPC_State_Copier copier( io, copy );
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// Make state data more readable by putting 64K RAM, 16 SMP registers,
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// then DSP (with its 128 registers) first
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// RAM
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enable_rom( 0 ); // will get re-enabled if necessary in regs_loaded() below
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copier.copy( RAM, 0x10000 );
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{
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// SMP registers
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uint8_t regs [reg_count];
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uint8_t regs_in [reg_count];
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memcpy( regs, REGS, reg_count );
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memcpy( regs_in, REGS_IN, reg_count );
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copier.copy( regs, sizeof regs );
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copier.copy( regs_in, sizeof regs_in );
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memcpy( REGS, regs, reg_count);
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memcpy( REGS_IN, regs_in, reg_count );
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enable_rom( REGS [r_control] & 0x80 );
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}
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// CPU registers
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SPC_COPY( uint16_t, m.cpu_regs.pc );
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SPC_COPY( uint8_t, m.cpu_regs.a );
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SPC_COPY( uint8_t, m.cpu_regs.x );
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SPC_COPY( uint8_t, m.cpu_regs.y );
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SPC_COPY( uint8_t, m.cpu_regs.psw );
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SPC_COPY( uint8_t, m.cpu_regs.sp );
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copier.extra();
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SPC_COPY( int16_t, m.spc_time );
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SPC_COPY( int16_t, m.dsp_time );
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// DSP
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dsp.copy_state( io, copy );
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// Timers
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for ( int i = 0; i < timer_count; i++ )
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{
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Timer* t = &m.timers [i];
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t->period = IF_0_THEN_256( REGS [r_t0target + i] );
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t->enabled = REGS [r_control] >> i & 1;
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SPC_COPY( int16_t, t->next_time );
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SPC_COPY( uint8_t, t->divider );
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SPC_COPY( uint8_t, t->counter );
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copier.extra();
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}
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set_tempo( m.tempo );
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copier.extra();
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}
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#endif
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