mirror of https://github.com/snes9xgit/snes9x.git
Different IRQ handling.
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parent
aaae363257
commit
f6864c422f
3
cpu.cpp
3
cpu.cpp
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@ -229,8 +229,6 @@ static void S9xSoftResetCPU (void)
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CPU.PCBase = NULL;
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CPU.NMIPending = FALSE;
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CPU.IRQLine = FALSE;
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CPU.IRQTransition = FALSE;
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CPU.IRQLastState = FALSE;
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CPU.IRQExternal = FALSE;
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CPU.IRQPending = Timings.IRQPendCount;
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CPU.MemSpeed = SLOW_ONE_CYCLE;
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@ -268,6 +266,7 @@ static void S9xSoftResetCPU (void)
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Timings.H_Max = Timings.H_Max_Master;
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Timings.V_Max = Timings.V_Max_Master;
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Timings.NMITriggerPos = 0xffff;
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Timings.NextTimer = 0xffff;
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if (Model->_5A22 == 2)
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Timings.WRAMRefreshPos = SNES_WRAM_REFRESH_HC_v2;
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else
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11
cpuexec.cpp
11
cpuexec.cpp
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@ -229,7 +229,7 @@ void S9xMainLoop (void)
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}
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}
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if (CPU.IRQTransition || CPU.IRQExternal)
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if (CPU.Cycles >= Timings.NextTimer || CPU.IRQExternal)
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{
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if (CPU.IRQPending)
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CPU.IRQPending--;
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@ -241,7 +241,7 @@ void S9xMainLoop (void)
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Registers.PCw++;
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}
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CPU.IRQTransition = FALSE;
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S9xUpdateIRQPositions();
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CPU.IRQPending = Timings.IRQPendCount;
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if (!CheckFlag(IRQ))
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@ -288,9 +288,7 @@ void S9xMainLoop (void)
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if (CPU.PCBase)
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{
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Op = CPU.PCBase[Registers.PCw];
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CPU.PrevCycles = CPU.Cycles;
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CPU.Cycles += CPU.MemSpeed;
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S9xCheckInterrupts();
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Opcodes = ICPU.S9xOpcodes;
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}
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else
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@ -414,9 +412,10 @@ void S9xDoHEventProcessing (void)
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S9xAPUEndScanline();
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CPU.Cycles -= Timings.H_Max;
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CPU.PrevCycles -= Timings.H_Max;
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if (Timings.NMITriggerPos != 0xffff)
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Timings.NMITriggerPos -= Timings.H_Max;
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if (Timings.NextTimer != 0xffff)
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Timings.NextTimer -= Timings.H_Max;
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S9xAPUSetReferenceTime(CPU.Cycles);
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CPU.V_Counter++;
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@ -557,9 +556,7 @@ void S9xDoHEventProcessing (void)
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S9xTraceFormattedMessage("*** WRAM Refresh HC:%04d", CPU.Cycles);
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#endif
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CPU.PrevCycles = CPU.Cycles;
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CPU.Cycles += SNES_WRAM_REFRESH_CYCLES;
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S9xCheckInterrupts();
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S9xReschedule();
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42
cpuexec.h
42
cpuexec.h
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@ -287,46 +287,4 @@ static inline void S9xFixCycles (void)
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}
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}
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static inline void S9xCheckInterrupts (void)
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{
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bool8 thisIRQ = PPU.HTimerEnabled | PPU.VTimerEnabled;
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if (CPU.IRQLine & thisIRQ)
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CPU.IRQTransition = TRUE;
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if (PPU.HTimerEnabled)
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{
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int32 htimepos = PPU.HTimerPosition;
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if ((CPU.Cycles >= Timings.H_Max) & (htimepos < CPU.PrevCycles))
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htimepos += Timings.H_Max;
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if ((CPU.PrevCycles >= htimepos) | (CPU.Cycles < htimepos))
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thisIRQ = FALSE;
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}
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if (PPU.VTimerEnabled)
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{
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int32 vcounter = CPU.V_Counter;
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if ((CPU.Cycles >= Timings.H_Max) & ((!PPU.HTimerEnabled) | (PPU.HTimerPosition < CPU.PrevCycles))) {
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vcounter++;
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if(vcounter >= Timings.V_Max)
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vcounter = 0;
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}
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if (vcounter != PPU.VTimerPosition)
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thisIRQ = FALSE;
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}
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if ((!CPU.IRQLastState) & thisIRQ)
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{
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#ifdef DEBUGGER
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S9xTraceFormattedMessage("--- /IRQ High->Low prev HC:%04d curr HC:%04d HTimer:%d Pos:%04d VTimer:%d Pos:%03d",
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CPU.PrevCycles, CPU.Cycles, PPU.HTimerEnabled, PPU.HTimerPosition, PPU.VTimerEnabled, PPU.VTimerPosition);
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#endif
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CPU.IRQLine = TRUE;
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}
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CPU.IRQLastState = thisIRQ;
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}
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#endif
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@ -205,7 +205,7 @@
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#ifdef SA1_OPCODES
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#define AddCycles(n) { SA1.Cycles += (n); }
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#else
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#define AddCycles(n) { CPU.PrevCycles = CPU.Cycles; CPU.Cycles += (n); S9xCheckInterrupts(); while (CPU.Cycles >= CPU.NextEvent) S9xDoHEventProcessing(); }
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#define AddCycles(n) { CPU.Cycles += (n); while (CPU.Cycles >= CPU.NextEvent) S9xDoHEventProcessing(); }
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#endif
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#include "cpuaddr.h"
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2
dma.cpp
2
dma.cpp
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@ -200,7 +200,7 @@
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#include "missing.h"
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#endif
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#define ADD_CYCLES(n) { CPU.PrevCycles = CPU.Cycles; CPU.Cycles += (n); S9xCheckInterrupts(); }
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#define ADD_CYCLES(n) { CPU.Cycles += (n); }
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extern uint8 *HDMAMemPointers[8];
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extern int HDMA_ModeByteCounts[8];
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4
getset.h
4
getset.h
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@ -206,9 +206,7 @@
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#define addCyclesInMemoryAccess \
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if (!CPU.InDMAorHDMA) \
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{ \
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CPU.PrevCycles = CPU.Cycles; \
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CPU.Cycles += speed; \
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S9xCheckInterrupts(); \
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while (CPU.Cycles >= CPU.NextEvent) \
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S9xDoHEventProcessing(); \
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}
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@ -216,9 +214,7 @@
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#define addCyclesInMemoryAccess_x2 \
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if (!CPU.InDMAorHDMA) \
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{ \
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CPU.PrevCycles = CPU.Cycles; \
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CPU.Cycles += speed << 1; \
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S9xCheckInterrupts(); \
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while (CPU.Cycles >= CPU.NextEvent) \
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S9xDoHEventProcessing(); \
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}
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72
ppu.cpp
72
ppu.cpp
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@ -269,7 +269,43 @@ static inline void S9xTryGunLatch (bool force)
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}
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}
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void S9xUpdateHVTimerPosition (void)
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static int CyclesUntilNext (int hc, int vc)
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{
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int32 total = 0;
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int vpos = CPU.V_Counter;
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// Advance to next hc
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total = (hc - CPU.Cycles);
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if (total < 0)
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{
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total += Timings.H_Max;
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vpos++;
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}
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if (vc - vpos >= 0)
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{
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// It's still in this frame */
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// Add number of lines
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total += (vc - vpos) * Timings.H_Max;
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// If line 240 is in there and we're odd, subtract a dot
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if (vpos <= 240 && vc > 240 && Timings.InterlaceField)
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total -= ONE_DOT_CYCLE;
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}
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else
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{
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total += (Timings.V_Max - vpos) * Timings.H_Max;
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if (vpos <= 240 && Timings.InterlaceField)
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total -= ONE_DOT_CYCLE;
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total += (vc) * Timings.H_Max;
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if (vc > 240 && !Timings.InterlaceField)
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total -= ONE_DOT_CYCLE;
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}
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return total;
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}
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void S9xUpdateIRQPositions (void)
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{
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PPU.HTimerPosition = PPU.IRQHBeamPos * ONE_DOT_CYCLE + Timings.IRQTriggerCycles;
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if (Timings.H_Max == Timings.H_Max_Master) // 1364
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@ -291,6 +327,16 @@ void S9xUpdateHVTimerPosition (void)
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PPU.VTimerPosition = 0;
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}
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if (!PPU.HTimerEnabled && !PPU.VTimerEnabled)
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{
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Timings.NextTimer = 0xffff;
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}
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else
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{
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Timings.NextTimer =
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CyclesUntilNext (PPU.HTimerEnabled ? PPU.HTimerPosition : 0,
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PPU.VTimerEnabled ? PPU.VTimerPosition : 0);
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}
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#ifdef DEBUGGER
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S9xTraceFormattedMessage("--- IRQ Timer set HTimer:%d Pos:%04d VTimer:%d Pos:%03d",
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PPU.HTimerEnabled, PPU.HTimerPosition, PPU.VTimerEnabled, PPU.VTimerPosition);
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@ -1502,14 +1548,10 @@ void S9xSetCPU (uint8 Byte, uint16 Address)
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else
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PPU.HTimerEnabled = FALSE;
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if (CPU.IRQLine && !PPU.HTimerEnabled && PPU.VTimerEnabled)
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CPU.IRQTransition = TRUE;
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if (!PPU.HTimerEnabled && !PPU.VTimerEnabled)
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{
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if (!(Byte & 0x10) && !(Byte & 0x20))
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CPU.IRQLine = FALSE;
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CPU.IRQTransition = FALSE;
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}
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S9xUpdateIRQPositions();
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// NMI can trigger immediately during VBlank as long as NMI_read ($4210) wasn't cleard.
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if ((Byte & 0x80) && !(Memory.FillRAM[0x4200] & 0x80) &&
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@ -1576,7 +1618,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQHBeamPos;
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PPU.IRQHBeamPos = (PPU.IRQHBeamPos & 0xff00) | Byte;
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if (PPU.IRQHBeamPos != pos)
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S9xUpdateHVTimerPosition();
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S9xUpdateIRQPositions();
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#ifdef DEBUGGER
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missing.hirq_pos = PPU.IRQHBeamPos;
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#endif
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@ -1586,7 +1628,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQHBeamPos;
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PPU.IRQHBeamPos = (PPU.IRQHBeamPos & 0xff) | ((Byte & 1) << 8);
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if (PPU.IRQHBeamPos != pos)
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S9xUpdateHVTimerPosition();
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S9xUpdateIRQPositions();
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#ifdef DEBUGGER
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missing.hirq_pos = PPU.IRQHBeamPos;
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#endif
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@ -1596,7 +1638,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQVBeamPos;
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PPU.IRQVBeamPos = (PPU.IRQVBeamPos & 0xff00) | Byte;
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if (PPU.IRQVBeamPos != pos)
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S9xUpdateHVTimerPosition();
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S9xUpdateIRQPositions();
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#ifdef DEBUGGER
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missing.virq_pos = PPU.IRQVBeamPos;
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#endif
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@ -1606,7 +1648,7 @@ if (Settings.TraceHCEvent)
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pos = PPU.IRQVBeamPos;
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PPU.IRQVBeamPos = (PPU.IRQVBeamPos & 0xff) | ((Byte & 1) << 8);
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if (PPU.IRQVBeamPos != pos)
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S9xUpdateHVTimerPosition();
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S9xUpdateIRQPositions();
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#ifdef DEBUGGER
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missing.virq_pos = PPU.IRQVBeamPos;
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#endif
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return;
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// XXX: Not quite right...
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if (Byte) {
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CPU.PrevCycles = CPU.Cycles;
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CPU.Cycles += Timings.DMACPUSync;
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S9xCheckInterrupts();
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CPU.Cycles += Timings.DMACPUSync;
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}
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if (Byte & 0x01)
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S9xDoDMA(0);
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@ -1795,7 +1835,7 @@ uint8 S9xGetCPU (uint16 Address)
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case 0x4211: // TIMEUP
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byte = CPU.IRQLine ? 0x80 : 0;
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CPU.IRQLine = FALSE;
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CPU.IRQTransition = FALSE;
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S9xUpdateIRQPositions();
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return (byte | (OpenBus & 0x7f));
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2
ppu.h
2
ppu.h
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@ -389,7 +389,7 @@ void S9xSetPPU (uint8, uint16);
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uint8 S9xGetPPU (uint16);
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void S9xSetCPU (uint8, uint16);
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uint8 S9xGetCPU (uint16);
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void S9xUpdateHVTimerPosition (void);
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void S9xUpdateIRQPositions (void);
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void S9xFixColourBrightness (void);
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void S9xDoAutoJoypad (void);
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@ -1780,6 +1780,7 @@ int S9xUnfreezeFromStream (STREAM stream)
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ICPU.ShiftedDB = Registers.DB << 16;
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S9xSetPCBase(Registers.PBPC);
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S9xUnpackStatus();
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S9xUpdateIRQPositions();
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S9xFixCycles();
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for (int d = 0; d < 8; d++)
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