From e14a32dd8c744f3f01b512c22cfe4c50abd1d3a0 Mon Sep 17 00:00:00 2001 From: Brandon Wright Date: Thu, 17 May 2018 14:41:48 -0500 Subject: [PATCH] Add some NMI debugging info. --- cpuexec.cpp | 15 +++++++++++++++ debug.cpp | 5 +++-- ppu.cpp | 11 +++++++++++ 3 files changed, 29 insertions(+), 2 deletions(-) diff --git a/cpuexec.cpp b/cpuexec.cpp index f5fc203a..336560f7 100644 --- a/cpuexec.cpp +++ b/cpuexec.cpp @@ -211,6 +211,10 @@ void S9xMainLoop (void) { if (CPU.NMIPending) { + #ifdef DEBUGGER + if (Settings.TraceHCEvent) + S9xTraceFormattedMessage ("Comparing %d to %d\n", Timings.NMITriggerPos, CPU.Cycles); + #endif if (Timings.NMITriggerPos <= CPU.Cycles) { CPU.NMIPending = FALSE; @@ -414,7 +418,14 @@ void S9xDoHEventProcessing (void) S9xAPUSetReferenceTime(CPU.Cycles); if ((Timings.NMITriggerPos != 0xffff) && (Timings.NMITriggerPos >= Timings.H_Max)) + { Timings.NMITriggerPos -= Timings.H_Max; +#ifdef DEBUGGER + if (Settings.TraceHCEvent) + S9xTraceFormattedMessage ("NMI Trigger pos changed to %d\n", Timings.NMITriggerPos); +#endif + } + CPU.V_Counter++; if (CPU.V_Counter >= Timings.V_Max) // V ranges from 0 to Timings.V_Max - 1 @@ -503,6 +514,10 @@ void S9xDoHEventProcessing (void) Memory.FillRAM[0x4210] = 0x80 | Model->_5A22; if (Memory.FillRAM[0x4200] & 0x80) { +#ifdef DEBUGGER + if (Settings.TraceHCEvent) + S9xTraceFormattedMessage ("NMI Scheduled for next scanline."); +#endif // FIXME: triggered at HC=6, checked just before the final CPU cycle, // then, when to call S9xOpcode_NMI()? CPU.NMIPending = TRUE; diff --git a/debug.cpp b/debug.cpp index aa023c8a..46dfb13c 100644 --- a/debug.cpp +++ b/debug.cpp @@ -889,7 +889,7 @@ static uint8 debug_cpu_op_print (char *Line, uint8 Bank, uint16 Address) break; } - sprintf(Line, "%-44s A:%04X X:%04X Y:%04X D:%04X DB:%02X S:%04X P:%c%c%c%c%c%c%c%c%c HC:%04ld VC:%03ld FC:%02d %03x", + sprintf(Line, "%-44s A:%04X X:%04X Y:%04X D:%04X DB:%02X S:%04X P:%c%c%c%c%c%c%c%c%c HC:%04ld VC:%03ld FC:%02d %03x %c", Line, Registers.A.W, Registers.X.W, Registers.Y.W, Registers.D.W, Registers.DB, Registers.S.W, CheckEmulation() ? 'E' : 'e', @@ -904,7 +904,8 @@ static uint8 debug_cpu_op_print (char *Line, uint8 Bank, uint16 Address) (long) CPU.Cycles, (long) CPU.V_Counter, IPPU.FrameCount, - (CPU.IRQExternal ? 0x100 : 0) | (PPU.HTimerEnabled ? 0x10 : 0) | (PPU.VTimerEnabled ? 0x01 : 0)); + (CPU.IRQExternal ? 0x100 : 0) | (PPU.HTimerEnabled ? 0x10 : 0) | (PPU.VTimerEnabled ? 0x01 : 0), + CPU.NMIPending ? 'N' : '.'); return (Size); } diff --git a/ppu.cpp b/ppu.cpp index d1e2bafa..a2a0c0b3 100644 --- a/ppu.cpp +++ b/ppu.cpp @@ -1476,6 +1476,10 @@ void S9xSetCPU (uint8 Byte, uint16 Address) switch (Address) { case 0x4200: // NMITIMEN + #ifdef DEBUGGER + if (Settings.TraceHCEvent) + S9xTraceFormattedMessage("Write to 0x4200. Byte is %2x was %2x\n", Byte, Memory.FillRAM[Address]); + #endif if (Byte & 0x20) { PPU.VTimerEnabled = TRUE; @@ -1511,10 +1515,17 @@ void S9xSetCPU (uint8 Byte, uint16 Address) if ((Byte & 0x80) && !(Memory.FillRAM[0x4200] & 0x80) && (CPU.V_Counter >= PPU.ScreenHeight + FIRST_VISIBLE_LINE) && (Memory.FillRAM[0x4210] & 0x80)) { + // FIXME: triggered at HC+=6, checked just before the final CPU cycle, // then, when to call S9xOpcode_NMI()? CPU.NMIPending = TRUE; Timings.NMITriggerPos = CPU.Cycles + 6 + 6; + +#ifdef DEBUGGER +if (Settings.TraceHCEvent) + S9xTraceFormattedMessage("NMI Triggered on low-to-high occurring at next HC=%d\n", Timings.NMITriggerPos); +#endif + } #ifdef DEBUGGER