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Move AddCycles to be consistent with other OPs.

This commit is contained in:
BearOso 2022-10-22 14:51:44 -05:00
parent a33f0f3540
commit ae12429a0d
1 changed files with 3 additions and 3 deletions
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6
cpuops.cpp
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@ -2849,31 +2849,31 @@ static void Op22E1 (void)
// Note: JSL is a new instruction, // Note: JSL is a new instruction,
// and so doesn't respect the emu-mode stack bounds. // and so doesn't respect the emu-mode stack bounds.
uint32 addr = AbsoluteLong(JSR); uint32 addr = AbsoluteLong(JSR);
AddCycles(ONE_CYCLE);
PushB(Registers.PB); PushB(Registers.PB);
PushW(Registers.PCw - 1); PushW(Registers.PCw - 1);
Registers.SH = 1; Registers.SH = 1;
S9xSetPCBase(addr); S9xSetPCBase(addr);
AddCycles(ONE_CYCLE);
} }
static void Op22E0 (void) static void Op22E0 (void)
{ {
uint32 addr = AbsoluteLong(JSR); uint32 addr = AbsoluteLong(JSR);
AddCycles(ONE_CYCLE);
PushB(Registers.PB); PushB(Registers.PB);
PushW(Registers.PCw - 1); PushW(Registers.PCw - 1);
S9xSetPCBase(addr); S9xSetPCBase(addr);
AddCycles(ONE_CYCLE);
} }
static void Op22Slow (void) static void Op22Slow (void)
{ {
uint32 addr = AbsoluteLongSlow(JSR); uint32 addr = AbsoluteLongSlow(JSR);
AddCycles(ONE_CYCLE);
PushB(Registers.PB); PushB(Registers.PB);
PushW(Registers.PCw - 1); PushW(Registers.PCw - 1);
if (CheckEmulation()) if (CheckEmulation())
Registers.SH = 1; Registers.SH = 1;
S9xSetPCBase(addr); S9xSetPCBase(addr);
AddCycles(ONE_CYCLE);
} }
static void Op6BE1 (void) static void Op6BE1 (void)