From 9a446266867da27850a8ff6f5100f7b063308ce1 Mon Sep 17 00:00:00 2001
From: Brandon Wright <bearoso@gmail.com>
Date: Wed, 27 Feb 2019 18:28:48 -0600
Subject: [PATCH] Revert "IPL rom mapping optimization."

This reverts commit 7dd2f760f72b99ba9d565db2e939df4c49b87502.
---
 apu/bapu/smp/core.cpp      |  8 ++++----
 apu/bapu/smp/memory.cpp    | 27 +++------------------------
 apu/bapu/smp/smp.cpp       |  2 --
 apu/bapu/smp/smp.hpp       |  1 -
 apu/bapu/smp/smp_state.cpp | 11 -----------
 5 files changed, 7 insertions(+), 42 deletions(-)

diff --git a/apu/bapu/smp/core.cpp b/apu/bapu/smp/core.cpp
index 53d0ef09..80508347 100644
--- a/apu/bapu/smp/core.cpp
+++ b/apu/bapu/smp/core.cpp
@@ -27,19 +27,19 @@ void SMP::op_io(unsigned clocks) {
 uint8 SMP::op_read(uint16 addr) {
   tick();
   if((addr & 0xfff0) == 0x00f0) return mmio_read(addr);
+  if(addr >= 0xffc0 && status.iplrom_enable) return iplrom[addr & 0x3f];
   return apuram[addr];
 }
 
 void SMP::op_write(uint16 addr, uint8 data) {
   tick();
-  if((addr & 0xfff0) == 0x00f0 || addr >= 0xffc0)
-    mmio_write(addr, data);
-  else
-    apuram[addr] = data;
+  if((addr & 0xfff0) == 0x00f0) mmio_write(addr, data);
+  apuram[addr] = data;  //all writes go to RAM, even MMIO writes
 }
 
 uint8 SMP::op_readpc() {
   tick();
+  if (regs.pc >= 0xffc0 && status.iplrom_enable) return iplrom[regs.pc++ & 0x3f];
   return apuram[regs.pc++];
 }
 
diff --git a/apu/bapu/smp/memory.cpp b/apu/bapu/smp/memory.cpp
index 2b89646c..46698d8a 100644
--- a/apu/bapu/smp/memory.cpp
+++ b/apu/bapu/smp/memory.cpp
@@ -8,6 +8,7 @@ void SMP::port_write(unsigned addr, unsigned data) {
 
 unsigned SMP::mmio_read(unsigned addr) {
   switch(addr) {
+
   case 0xf2:
     return status.dsp_addr;
 
@@ -50,31 +51,10 @@ unsigned SMP::mmio_read(unsigned addr) {
 }
 
 void SMP::mmio_write(unsigned addr, unsigned data) {
-  if (addr >= 0xffc0)
-  {
-    if (status.iplrom_enable)
-      highmem[addr & 0x3f] = data;
-    else
-      apuram[addr] = data;
-    return;
-  }
-
   switch(addr) {
 
   case 0xf1:
-    if (((data & 0x80) > 0) != status.iplrom_enable) {
-      if (status.iplrom_enable)
-      {
-        status.iplrom_enable = false;
-        memcpy(&apuram[0xffc0], highmem, 64);
-      }
-      else
-      {
-        status.iplrom_enable = true;
-        memcpy(highmem, &apuram[0xffc0], 64);
-        memcpy(&apuram[0xffc0], iplrom, 64);
-      }
-    }
+    status.iplrom_enable = data & 0x80;
 
     if(data & 0x30) {
       if(data & 0x20) {
@@ -142,7 +122,6 @@ void SMP::mmio_write(unsigned addr, unsigned data) {
   case 0xfc:
     timer2.target = data;
     break;
-  }
 
-  apuram[addr] = data;  //all writes go to RAM, even MMIO writes
+  }
 }
diff --git a/apu/bapu/smp/smp.cpp b/apu/bapu/smp/smp.cpp
index 9901c297..2cf58afd 100644
--- a/apu/bapu/smp/smp.cpp
+++ b/apu/bapu/smp/smp.cpp
@@ -50,8 +50,6 @@ void SMP::reset() {
 
   //$00f1
   status.iplrom_enable = true;
-  memcpy(highmem, iplrom, 64);
-  memcpy(&apuram[0xffc0], iplrom, 64);
 
   //$00f2
   status.dsp_addr = 0x00;
diff --git a/apu/bapu/smp/smp.hpp b/apu/bapu/smp/smp.hpp
index 9f474102..19c0f74c 100644
--- a/apu/bapu/smp/smp.hpp
+++ b/apu/bapu/smp/smp.hpp
@@ -1,7 +1,6 @@
 class SMP : public Processor {
 public:
   static const uint8 iplrom[64];
-  uint8 highmem[64];
   uint8 *apuram;
 
   unsigned port_read(unsigned port);
diff --git a/apu/bapu/smp/smp_state.cpp b/apu/bapu/smp/smp_state.cpp
index c992ba53..536850fa 100644
--- a/apu/bapu/smp/smp_state.cpp
+++ b/apu/bapu/smp/smp_state.cpp
@@ -73,11 +73,6 @@ void SMP::save_spc (uint8 *block) {
 void SMP::save_state(uint8 **block) {
   uint8 *ptr = *block;
   memcpy(ptr, apuram, 64 * 1024);
-  if (status.iplrom_enable)
-  {
-    memcpy (&ptr[0xffc0], highmem, 64);
-  }
-
   ptr += 64 * 1024;
 
 #undef INT32
@@ -166,12 +161,6 @@ void SMP::load_state(uint8 **block) {
 
   INT32(status.iplrom_enable);
 
-  if (status.iplrom_enable)
-  {
-    memcpy(highmem, &apuram[0xffc0], 64);
-    memcpy(&apuram[0xffc0], iplrom, 64);
-  }
-
   INT32(status.dsp_addr);
 
   INT32(status.ram00f8);