mirror of https://github.com/snes9xgit/snes9x.git
Merge remote-tracking branch 'bsx/bsx'
This commit is contained in:
commit
994698912a
505
bsx.cpp
505
bsx.cpp
|
@ -199,7 +199,7 @@
|
|||
//#define BSX_DEBUG
|
||||
|
||||
#define BIOS_SIZE 0x100000
|
||||
#define FLASH_SIZE 0x200000
|
||||
#define FLASH_SIZE 0x100000
|
||||
#define PSRAM_SIZE 0x80000
|
||||
|
||||
#define Map Memory.Map
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||||
|
@ -231,7 +231,7 @@ static const uint8 flashcard[20] =
|
|||
{
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||||
0x4D, 0x00, 0x50, 0x00, // vendor id
|
||||
0x00, 0x00, // ?
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||||
0x2B, 0x00, // 2MB Flash (1MB = 0x2A)
|
||||
0x1A, 0x00, // 2MB Flash (1MB = 0x2A)
|
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
@ -417,13 +417,22 @@ static void map_psram_mirror_sub (uint32 bank)
|
|||
{
|
||||
for (c = 0; c < 0x100; c += 16)
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{
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for (i = c; i < c + 8; i++)
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Map[i + bank] = &PSRAM[(c << 11) % PSRAM_SIZE];
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if ((bank & 0x7F) >= 0x40)
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{
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for (i = c; i < c + 8; i++)
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Map[i + bank] = &PSRAM[(c << 11) % PSRAM_SIZE];
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for (i = c; i < c + 8; i++)
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{
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BlockIsRAM[i + bank] = TRUE;
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BlockIsROM[i + bank] = FALSE;
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}
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}
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for (i = c + 8; i < c + 16; i++)
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Map[i + bank] = &PSRAM[(c << 11) % PSRAM_SIZE] - 0x8000;
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for (i = c; i < c + 16; i++)
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for (i = c + 8; i < c + 16; i++)
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{
|
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BlockIsRAM[i + bank] = TRUE;
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||||
BlockIsROM[i + bank] = FALSE;
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|
@ -432,42 +441,126 @@ static void map_psram_mirror_sub (uint32 bank)
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|||
}
|
||||
}
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||||
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||||
static void BSX_Map_PSRAM (void)
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static void BSX_Map_PSRAM(void)
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{
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int c;
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int c, i;
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||||
// Banks 70->77:0000-FFFF
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// FIXME: could be toggled by $03
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for (c = 0; c < 0x80; c++)
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if (!BSX.MMC[0x02])
|
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{
|
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Map[c + 0x700] = &PSRAM[((c & 0x70) << 12) % PSRAM_SIZE];
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BlockIsRAM[c + 0x700] = TRUE;
|
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BlockIsROM[c + 0x700] = FALSE;
|
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}
|
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//LoROM Mode
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if (!BSX.MMC[0x05] && !BSX.MMC[0x06])
|
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{
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//Map PSRAM to 00-0F/80-8F
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if (BSX.MMC[0x03])
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map_psram_mirror_sub(0x00);
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// Banks 20->3F:6000-7FFF mirrors 70->77:6000-7FFF
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for (c = 0x200; c < 0x400; c += 16)
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if (BSX.MMC[0x04])
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map_psram_mirror_sub(0x80);
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}
|
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else if (BSX.MMC[0x05] && !BSX.MMC[0x06])
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{
|
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//Map PSRAM to 20-2F/A0-AF
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if (BSX.MMC[0x03])
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map_psram_mirror_sub(0x20);
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|
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if (BSX.MMC[0x04])
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map_psram_mirror_sub(0xA0);
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}
|
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else if (!BSX.MMC[0x05] && BSX.MMC[0x06])
|
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{
|
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//Map PSRAM to 40-4F/C0-CF
|
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if (BSX.MMC[0x03])
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map_psram_mirror_sub(0x40);
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|
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if (BSX.MMC[0x04])
|
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map_psram_mirror_sub(0xC0);
|
||||
}
|
||||
else
|
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{
|
||||
//Map PSRAM to 60-6F/E0-EF
|
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if (BSX.MMC[0x03])
|
||||
map_psram_mirror_sub(0x60);
|
||||
|
||||
if (BSX.MMC[0x04])
|
||||
map_psram_mirror_sub(0xE0);
|
||||
}
|
||||
|
||||
//Map PSRAM to 70-7D/F0-FF
|
||||
if (BSX.MMC[0x03])
|
||||
map_psram_mirror_sub(0x70);
|
||||
|
||||
if (BSX.MMC[0x04])
|
||||
map_psram_mirror_sub(0xF0);
|
||||
}
|
||||
else
|
||||
{
|
||||
Map[c + 6] = &PSRAM[((c & 0x70) << 12) % PSRAM_SIZE];
|
||||
Map[c + 7] = &PSRAM[((c & 0x70) << 12) % PSRAM_SIZE];
|
||||
BlockIsRAM[c + 6] = TRUE;
|
||||
BlockIsRAM[c + 7] = TRUE;
|
||||
BlockIsROM[c + 6] = FALSE;
|
||||
BlockIsROM[c + 7] = FALSE;
|
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//HiROM Mode
|
||||
if (!BSX.MMC[0x05] && !BSX.MMC[0x06])
|
||||
{
|
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//Map PSRAM to 40-47/C0-C7
|
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if (BSX.MMC[0x03])
|
||||
map_psram_mirror_sub(0x40);
|
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|
||||
if (BSX.MMC[0x04])
|
||||
map_psram_mirror_sub(0xC0);
|
||||
|
||||
}
|
||||
else if (BSX.MMC[0x05] && !BSX.MMC[0x06])
|
||||
{
|
||||
//Map PSRAM to 50-57/D0-D7
|
||||
if (BSX.MMC[0x03])
|
||||
map_psram_mirror_sub(0x50);
|
||||
|
||||
if (BSX.MMC[0x04])
|
||||
map_psram_mirror_sub(0xD0);
|
||||
}
|
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else if (!BSX.MMC[0x05] && BSX.MMC[0x06])
|
||||
{
|
||||
//Map PSRAM to 60-67/E0-E7
|
||||
if (BSX.MMC[0x03])
|
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map_psram_mirror_sub(0x60);
|
||||
|
||||
if (BSX.MMC[0x04])
|
||||
map_psram_mirror_sub(0xE0);
|
||||
}
|
||||
else
|
||||
{
|
||||
//Map PSRAM to 70-77/F0-F7
|
||||
if (BSX.MMC[0x03])
|
||||
map_psram_mirror_sub(0x70);
|
||||
|
||||
if (BSX.MMC[0x04])
|
||||
map_psram_mirror_sub(0xF0);
|
||||
}
|
||||
|
||||
if (BSX.MMC[0x03])
|
||||
{
|
||||
//Map PSRAM to 20->3F:6000-7FFF
|
||||
for (c = 0x200; c < 0x400; c += 16)
|
||||
{
|
||||
Map[c + 6] = &PSRAM[((c & 0x70) << 12) % PSRAM_SIZE];
|
||||
Map[c + 7] = &PSRAM[((c & 0x70) << 12) % PSRAM_SIZE];
|
||||
BlockIsRAM[c + 6] = TRUE;
|
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BlockIsRAM[c + 7] = TRUE;
|
||||
BlockIsROM[c + 6] = FALSE;
|
||||
BlockIsROM[c + 7] = FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
if (BSX.MMC[0x04])
|
||||
{
|
||||
//Map PSRAM to A0->BF:6000-7FFF
|
||||
for (c = 0xA00; c < 0xC00; c += 16)
|
||||
{
|
||||
Map[c + 6] = &PSRAM[((c & 0x70) << 12) % PSRAM_SIZE];
|
||||
Map[c + 7] = &PSRAM[((c & 0x70) << 12) % PSRAM_SIZE];
|
||||
BlockIsRAM[c + 6] = TRUE;
|
||||
BlockIsRAM[c + 7] = TRUE;
|
||||
BlockIsROM[c + 6] = FALSE;
|
||||
BlockIsROM[c + 7] = FALSE;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (!BSX.MMC[0x05])
|
||||
// Banks 40->4F:0000-FFFF mirrors 70->77:0000-7FFF
|
||||
map_psram_mirror_sub(0x40);
|
||||
|
||||
if (!BSX.MMC[0x06])
|
||||
// Banks 50->5F:0000-FFFF mirrors 70->77:0000-7FFF
|
||||
map_psram_mirror_sub(0x50);
|
||||
|
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// FIXME
|
||||
if (!BSX.MMC[0x03])
|
||||
// Banks 60->6F:0000-FFFF mirrors 70->77:0000-7FFF (?)
|
||||
map_psram_mirror_sub(0x60);
|
||||
}
|
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|
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static void BSX_Map_BIOS (void)
|
||||
|
@ -562,28 +655,8 @@ static void BSX_Map (void)
|
|||
|
||||
memcpy(BSX.prevMMC, BSX.MMC, sizeof(BSX.MMC));
|
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|
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// Do a quick bank change
|
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if (BSX.dirty2 && !BSX.dirty)
|
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{
|
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BSX_Map_Dirty();
|
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BSX_Map_BIOS();
|
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|
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BSX.dirty2 = FALSE;
|
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|
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Memory.map_WriteProtectROM();
|
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return;
|
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}
|
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|
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if (BSX.MMC[0x01])
|
||||
{
|
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MapROM = PSRAM;
|
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FlashSize = PSRAM_SIZE;
|
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}
|
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else
|
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{
|
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MapROM = FlashROM;
|
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FlashSize = FLASH_SIZE;
|
||||
}
|
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MapROM = FlashROM;
|
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FlashSize = FLASH_SIZE;
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|
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BSX_Map_SNES();
|
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|
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|
@ -592,12 +665,12 @@ static void BSX_Map (void)
|
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else
|
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BSX_Map_LoROM();
|
||||
|
||||
BSX_Map_FlashIO();
|
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BSX_Map_PSRAM();
|
||||
BSX_Map_SRAM();
|
||||
BSX_Map_RAM();
|
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|
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BSX_Map_BIOS();
|
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BSX_Map_FlashIO();
|
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BSX_Map_MMC();
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// Monitor new register changes
|
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|
@ -607,30 +680,24 @@ static void BSX_Map (void)
|
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Memory.map_WriteProtectROM();
|
||||
}
|
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|
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static uint8 BSX_Get_Bypass_FlashIO (uint16 offset)
|
||||
static uint8 BSX_Get_Bypass_FlashIO (uint32 offset)
|
||||
{
|
||||
MapROM = FlashROM = Memory.ROM + Multi.cartOffsetB;
|
||||
|
||||
if (BSX.MMC[0x02])
|
||||
return (MapROM[offset]);
|
||||
return (MapROM[offset & 0x0FFFFF]);
|
||||
else
|
||||
{
|
||||
if (offset < 0x8000)
|
||||
return (MapROM[offset]);
|
||||
else
|
||||
return (MapROM[offset - 0x8000]);
|
||||
}
|
||||
return (MapROM[(offset & 0x1F0000) >> 1 | (offset & 0x7FFF)]);
|
||||
}
|
||||
|
||||
static void BSX_Set_Bypass_FlashIO (uint16 offset, uint8 byte)
|
||||
static void BSX_Set_Bypass_FlashIO (uint32 offset, uint8 byte)
|
||||
{
|
||||
MapROM = FlashROM = Memory.ROM + Multi.cartOffsetB;
|
||||
|
||||
if (BSX.MMC[0x02])
|
||||
MapROM[offset] = byte;
|
||||
MapROM[offset & 0x0FFFFF] = MapROM[offset & 0x0FFFFF] & byte;
|
||||
else
|
||||
{
|
||||
if (offset < 0x8000)
|
||||
MapROM[offset] = byte;
|
||||
else
|
||||
MapROM[offset - 0x8000] = byte;
|
||||
}
|
||||
MapROM[(offset & 0x1F0000) >> 1 | (offset & 0x7FFF)] = MapROM[(offset & 0x1F0000) >> 1 | (offset & 0x7FFF)] & byte;
|
||||
}
|
||||
|
||||
uint8 S9xGetBSX (uint32 address)
|
||||
|
@ -640,43 +707,57 @@ uint8 S9xGetBSX (uint32 address)
|
|||
uint8 t = 0;
|
||||
|
||||
// MMC
|
||||
if ((bank >= 0x01 && bank <= 0x0E) && (offset == 0x5000))
|
||||
if ((bank >= 0x01 && bank <= 0x0E))
|
||||
return (BSX.MMC[bank]);
|
||||
|
||||
// Flash IO
|
||||
if (bank == 0xC0)
|
||||
if (bank >= 0xC0)
|
||||
{
|
||||
// default: read-through mode
|
||||
t = BSX_Get_Bypass_FlashIO(offset);
|
||||
t = BSX_Get_Bypass_FlashIO(address);
|
||||
|
||||
// note: may be more registers, purposes unknown
|
||||
switch (offset)
|
||||
{
|
||||
case 0x0002:
|
||||
if (BSX.flash_enable)
|
||||
t = 0x80; // status register?
|
||||
break;
|
||||
case 0x0002:
|
||||
case 0x8002:
|
||||
if (BSX.flash_bsr)
|
||||
t = 0xC0; // Page Status Register
|
||||
break;
|
||||
|
||||
case 0x5555:
|
||||
if (BSX.flash_enable)
|
||||
t = 0x80; // ???
|
||||
break;
|
||||
case 0x0004:
|
||||
case 0x8004:
|
||||
if (BSX.flash_gsr)
|
||||
t = 0x82; // Global Status Register
|
||||
break;
|
||||
|
||||
case 0xFF00:
|
||||
case 0xFF02:
|
||||
case 0xFF04:
|
||||
case 0xFF06:
|
||||
case 0xFF08:
|
||||
case 0xFF0A:
|
||||
case 0xFF0C:
|
||||
case 0xFF0E:
|
||||
case 0xFF10:
|
||||
case 0xFF12:
|
||||
// return flash vendor information
|
||||
if (BSX.read_enable)
|
||||
t = flashcard[offset - 0xFF00];
|
||||
break;
|
||||
case 0x5555:
|
||||
if (BSX.flash_enable)
|
||||
t = 0x80; // ???
|
||||
break;
|
||||
|
||||
case 0xFF00:
|
||||
case 0xFF02:
|
||||
case 0xFF04:
|
||||
case 0xFF06:
|
||||
case 0xFF08:
|
||||
case 0xFF0A:
|
||||
case 0xFF0C:
|
||||
case 0xFF0E:
|
||||
case 0xFF10:
|
||||
case 0xFF12:
|
||||
// return flash vendor information
|
||||
if (BSX.read_enable)
|
||||
t = flashcard[offset - 0xFF00];
|
||||
break;
|
||||
}
|
||||
|
||||
if (BSX.flash_csr)
|
||||
{
|
||||
t = 0x80; // Compatible Status Register
|
||||
BSX.flash_csr = false;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return (t);
|
||||
|
@ -688,115 +769,126 @@ void S9xSetBSX (uint8 byte, uint32 address)
|
|||
uint16 offset = address & 0xFFFF;
|
||||
|
||||
// MMC
|
||||
if ((bank >= 0x01 && bank <= 0x0E) && (offset == 0x5000))
|
||||
if ((bank >= 0x01 && bank <= 0x0E))
|
||||
{
|
||||
switch (bank)
|
||||
{
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x03:
|
||||
case 0x04:
|
||||
case 0x05:
|
||||
case 0x06:
|
||||
case 0x09:
|
||||
case 0x0A:
|
||||
case 0x0B:
|
||||
case 0x0C:
|
||||
case 0x0D:
|
||||
if (BSX.MMC[bank] != byte)
|
||||
{
|
||||
BSX.MMC[bank] = byte;
|
||||
BSX.dirty = TRUE;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x07:
|
||||
case 0x08:
|
||||
if (BSX.MMC[bank] != byte)
|
||||
{
|
||||
BSX.MMC[bank] = byte;
|
||||
BSX.dirty2 = TRUE;
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x0E:
|
||||
BSX.MMC[bank] = byte;
|
||||
if (byte && (BSX.dirty || BSX.dirty2))
|
||||
BSX_Map();
|
||||
break;
|
||||
}
|
||||
BSX.MMC[bank] = byte;
|
||||
if (bank == 0x0E)
|
||||
BSX_Map();
|
||||
}
|
||||
|
||||
// Flash IO
|
||||
if (bank == 0xC0)
|
||||
if (bank >= 0xC0)
|
||||
{
|
||||
BSX.old_write = BSX.new_write;
|
||||
BSX.new_write = address;
|
||||
|
||||
// ???: double writes to the desired address will bypass
|
||||
// flash registers
|
||||
if (BSX.old_write == BSX.new_write && BSX.write_enable)
|
||||
// Write to Flash
|
||||
if (BSX.write_enable)
|
||||
{
|
||||
BSX_Set_Bypass_FlashIO(offset, byte);
|
||||
BSX_Set_Bypass_FlashIO(address, byte);
|
||||
//MapROM[address & 0x3FFFFF] = byte;
|
||||
BSX.write_enable = false;
|
||||
return;
|
||||
}
|
||||
|
||||
// flash command handling
|
||||
// note: incomplete
|
||||
switch (offset)
|
||||
{
|
||||
case 0x0000:
|
||||
BSX.flash_command <<= 8;
|
||||
BSX.flash_command |= byte;
|
||||
if ((BSX.flash_command & 0xFFFF) == 0x38D0)
|
||||
{
|
||||
// retrieve information about the flash card
|
||||
BSX.flash_enable = TRUE;
|
||||
BSX.read_enable = TRUE;
|
||||
}
|
||||
break;
|
||||
// Flash Command Handling
|
||||
if (BSX.MMC[0xC]) {
|
||||
//Memory Pack Type 1 & 3 & 4
|
||||
BSX.flash_command <<= 8;
|
||||
BSX.flash_command |= byte;
|
||||
|
||||
case 0x2AAA:
|
||||
BSX.flash_command <<= 8;
|
||||
BSX.flash_command |= byte;
|
||||
break;
|
||||
switch (BSX.flash_command & 0xFF)
|
||||
{
|
||||
case 0x00:
|
||||
case 0xFF:
|
||||
//Reset to normal
|
||||
BSX.flash_enable = false;
|
||||
BSX.flash_bsr = false;
|
||||
BSX.flash_csr = false;
|
||||
BSX.flash_gsr = false;
|
||||
BSX.read_enable = false;
|
||||
BSX.write_enable = false;
|
||||
BSX.flash_cmd_done = true;
|
||||
break;
|
||||
|
||||
case 0x5555:
|
||||
BSX.flash_command <<= 8;
|
||||
BSX.flash_command |= byte;
|
||||
case 0x10:
|
||||
case 0x40:
|
||||
//Write Byte
|
||||
BSX.flash_enable = false;
|
||||
BSX.flash_bsr = false;
|
||||
BSX.flash_csr = true;
|
||||
BSX.flash_gsr = false;
|
||||
BSX.read_enable = false;
|
||||
BSX.write_enable = true;
|
||||
BSX.flash_cmd_done = true;
|
||||
break;
|
||||
|
||||
switch (BSX.flash_command & 0xFFFFFF)
|
||||
{
|
||||
case 0xAA55F0:
|
||||
// turn off flash i/o
|
||||
BSX.flash_enable = FALSE;
|
||||
BSX.write_enable = FALSE;
|
||||
BSX.read_enable = FALSE;
|
||||
break;
|
||||
case 0x50:
|
||||
//Clear Status Register
|
||||
BSX.flash_enable = false;
|
||||
BSX.flash_bsr = false;
|
||||
BSX.flash_csr = false;
|
||||
BSX.flash_gsr = false;
|
||||
BSX.flash_cmd_done = true;
|
||||
break;
|
||||
|
||||
case 0xAA55A0:
|
||||
// enable writing to flash
|
||||
BSX.old_write = 0;
|
||||
BSX.new_write = 0;
|
||||
BSX.flash_enable = TRUE;
|
||||
BSX.write_enable = TRUE;
|
||||
BSX_Map();
|
||||
break;
|
||||
case 0x70:
|
||||
//Read CSR
|
||||
BSX.flash_enable = false;
|
||||
BSX.flash_bsr = false;
|
||||
BSX.flash_csr = true;
|
||||
BSX.flash_gsr = false;
|
||||
BSX.read_enable = false;
|
||||
BSX.write_enable = false;
|
||||
BSX.flash_cmd_done = true;
|
||||
break;
|
||||
|
||||
case 0xAA5570:
|
||||
// turn on write-protection
|
||||
BSX.write_enable = FALSE;
|
||||
BSX_Map();
|
||||
break;
|
||||
case 0x71:
|
||||
//Read Extended Status Registers (Page and Global)
|
||||
BSX.flash_enable = false;
|
||||
BSX.flash_bsr = true;
|
||||
BSX.flash_csr = false;
|
||||
BSX.flash_gsr = true;
|
||||
BSX.read_enable = false;
|
||||
BSX.write_enable = false;
|
||||
BSX.flash_cmd_done = true;
|
||||
break;
|
||||
|
||||
case 0xAA5580:
|
||||
case 0xAA5510:
|
||||
// ???
|
||||
break;
|
||||
case 0x75:
|
||||
//Show Page Buffer / Vendor Info
|
||||
BSX.flash_csr = false;
|
||||
BSX.read_enable = true;
|
||||
BSX.flash_cmd_done = true;
|
||||
break;
|
||||
|
||||
}
|
||||
case 0xD0:
|
||||
//DO COMMAND
|
||||
switch (BSX.flash_command & 0xFFFF)
|
||||
{
|
||||
case 0x20D0: //Block Erase
|
||||
uint32 x;
|
||||
for (x = 0; x < 0x10000; x++) {
|
||||
//BSX_Set_Bypass_FlashIO(((address & 0xFF0000) + x), 0xFF);
|
||||
if (BSX.MMC[0x02])
|
||||
MapROM[(address & 0x0F0000) + x] = 0xFF;
|
||||
else
|
||||
MapROM[((address & 0x1E0000) >> 1) + x] = 0xFF;
|
||||
}
|
||||
break;
|
||||
|
||||
break;
|
||||
case 0xA7D0: //Chip Erase (ONLY IN TYPE 1 AND 4)
|
||||
if ((flashcard[6] & 0xF0) == 0x10 || (flashcard[6] & 0xF0) == 0x40)
|
||||
{
|
||||
uint32 x;
|
||||
for (x = 0; x < FLASH_SIZE; x++) {
|
||||
//BSX_Set_Bypass_FlashIO(x, 0xFF);
|
||||
MapROM[x] = 0xFF;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x38D0: //Flashcart Reset
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -1082,7 +1174,7 @@ void S9xInitBSX (void)
|
|||
uint8 *header = r1 ? Memory.ROM + 0x7FC0 : Memory.ROM + 0xFFC0;
|
||||
|
||||
FlashMode = (header[0x18] & 0xEF) == 0x20 ? FALSE : TRUE;
|
||||
FlashSize = (header[0x19] & 0x20) ? PSRAM_SIZE : FLASH_SIZE;
|
||||
FlashSize = FLASH_SIZE;
|
||||
|
||||
#ifdef BSX_DEBUG
|
||||
for (int i = 0; i <= 0x1F; i++)
|
||||
|
@ -1145,32 +1237,11 @@ void S9xResetBSX (void)
|
|||
memset(BSX.output, 0, sizeof(BSX.output));
|
||||
|
||||
// starting from the bios
|
||||
if (BSX.bootup)
|
||||
BSX.MMC[0x07] = BSX.MMC[0x08] = 0x80;
|
||||
else
|
||||
{
|
||||
BSX.MMC[0x02] = FlashMode ? 0x80: 0;
|
||||
BSX.MMC[0x02] = BSX.MMC[0x03] = BSX.MMC[0x05] = BSX.MMC[0x06] = 0x80;
|
||||
BSX.MMC[0x09] = BSX.MMC[0x0B] = 0x80;
|
||||
|
||||
// per bios: run from psram or flash card
|
||||
if (FlashSize == PSRAM_SIZE)
|
||||
{
|
||||
memcpy(PSRAM, FlashROM, PSRAM_SIZE);
|
||||
|
||||
BSX.MMC[0x01] = 0x80;
|
||||
BSX.MMC[0x03] = 0x80;
|
||||
BSX.MMC[0x04] = 0x80;
|
||||
BSX.MMC[0x0C] = 0x80;
|
||||
BSX.MMC[0x0D] = 0x80;
|
||||
}
|
||||
else
|
||||
{
|
||||
BSX.MMC[0x03] = 0x80;
|
||||
BSX.MMC[0x05] = 0x80;
|
||||
BSX.MMC[0x06] = 0x80;
|
||||
}
|
||||
|
||||
BSX.MMC[0x0E] = 0x80;
|
||||
}
|
||||
BSX.MMC[0x07] = BSX.MMC[0x08] = 0x80;
|
||||
BSX.MMC[0x0E] = 0x80;
|
||||
|
||||
BSX_Map();
|
||||
}
|
||||
|
|
5
bsx.h
5
bsx.h
|
@ -208,6 +208,11 @@ struct SBSX
|
|||
uint8 MMC[16];
|
||||
uint8 prevMMC[16];
|
||||
uint8 test2192[32];
|
||||
|
||||
bool flash_csr;
|
||||
bool flash_gsr;
|
||||
bool flash_bsr;
|
||||
bool flash_cmd_done;
|
||||
};
|
||||
|
||||
extern struct SBSX BSX;
|
||||
|
|
|
@ -422,7 +422,7 @@ S9xOpenROMDialog (void)
|
|||
{
|
||||
"*.smc", "*.SMC", "*.fig", "*.FIG", "*.sfc", "*.SFC",
|
||||
"*.jma", "*.JMA", "*.zip", "*.ZIP", "*.gd3", "*.GD3",
|
||||
"*.swc", "*.SWC", "*.gz" , "*.GZ",
|
||||
"*.swc", "*.SWC", "*.gz" , "*.GZ", "*.bs", "*.BS",
|
||||
NULL
|
||||
};
|
||||
|
||||
|
|
|
@ -178,7 +178,7 @@ void retro_get_system_info(struct retro_system_info *info)
|
|||
|
||||
info->library_name = "Snes9x";
|
||||
info->library_version = VERSION;
|
||||
info->valid_extensions = "smc|sfc|swc|fig";
|
||||
info->valid_extensions = "smc|sfc|swc|fig|bs";
|
||||
info->need_fullpath = false;
|
||||
info->block_extract = false;
|
||||
}
|
||||
|
|
196
memmap.cpp
196
memmap.cpp
|
@ -957,9 +957,9 @@ static void S9xDeinterleaveGD24 (int, uint8 *);
|
|||
static bool8 allASCII (uint8 *, int);
|
||||
static bool8 is_SufamiTurbo_BIOS (const uint8 *, uint32);
|
||||
static bool8 is_SufamiTurbo_Cart (const uint8 *, uint32);
|
||||
static bool8 is_SameGame_BIOS (const uint8 *, uint32);
|
||||
static bool8 is_BSCart_BIOS (const uint8 *, uint32);
|
||||
static bool8 is_SameGame_Add_On (const uint8 *, uint32);
|
||||
static bool8 is_GNEXT_BIOS (const uint8 *, uint32);
|
||||
static bool8 is_BSCartSA1_BIOS(const uint8 *, uint32);
|
||||
static bool8 is_GNEXT_Add_On (const uint8 *, uint32);
|
||||
static uint32 caCRC32 (uint8 *, uint32, uint32 crc32 = 0xffffffff);
|
||||
static uint32 ReadUPSPointer (const uint8 *, unsigned &, unsigned);
|
||||
|
@ -1243,10 +1243,22 @@ static bool8 is_SufamiTurbo_Cart (const uint8 *data, uint32 size)
|
|||
return (FALSE);
|
||||
}
|
||||
|
||||
static bool8 is_SameGame_BIOS (const uint8 *data, uint32 size)
|
||||
static bool8 is_BSCart_BIOS(const uint8 *data, uint32 size)
|
||||
{
|
||||
if (size == 0x100000 && strncmp((char *) (data + 0xffc0), "Same Game Tsume Game", 20) == 0)
|
||||
if ((data[0x7FB2] == 0x5A) && (data[0x7FB5] != 0x20) && (data[0x7FDA] == 0x33))
|
||||
{
|
||||
Memory.LoROM = TRUE;
|
||||
Memory.HiROM = FALSE;
|
||||
|
||||
return (TRUE);
|
||||
}
|
||||
else if ((data[0xFFB2] == 0x5A) && (data[0xFFB5] != 0x20) && (data[0xFFDA] == 0x33))
|
||||
{
|
||||
Memory.LoROM = FALSE;
|
||||
Memory.HiROM = TRUE;
|
||||
|
||||
return (TRUE);
|
||||
}
|
||||
else
|
||||
return (FALSE);
|
||||
}
|
||||
|
@ -1259,9 +1271,14 @@ static bool8 is_SameGame_Add_On (const uint8 *data, uint32 size)
|
|||
return (FALSE);
|
||||
}
|
||||
|
||||
static bool8 is_GNEXT_BIOS (const uint8 *data, uint32 size)
|
||||
static bool8 is_BSCartSA1_BIOS (const uint8 *data, uint32 size)
|
||||
{
|
||||
if (size == 0x180000 && strncmp((char *) (data + 0x7fc0), "SFC SDGUNDAMGNEXT", 17) == 0)
|
||||
//Same basic check as BSCart
|
||||
if (!is_BSCart_BIOS(data, size))
|
||||
return (FALSE);
|
||||
|
||||
//Checks if the game is Itoi's Bass Fishing No. 1 (ZBPJ) or SD Gundam G-NEXT (ZX3J)
|
||||
if (strncmp((char *)(data + 0x7fb2), "ZBPJ", 4) == 0 || strncmp((char *)(data + 0x7fb2), "ZX3J", 4) == 0)
|
||||
return (TRUE);
|
||||
else
|
||||
return (FALSE);
|
||||
|
@ -1872,11 +1889,11 @@ bool8 CMemory::LoadMultiCartInt ()
|
|||
if (is_SufamiTurbo_Cart(ROM + Multi.cartOffsetA, Multi.cartSizeA))
|
||||
Multi.cartType = 4;
|
||||
else
|
||||
if (is_SameGame_BIOS(ROM + Multi.cartOffsetA, Multi.cartSizeA))
|
||||
Multi.cartType = 3;
|
||||
else
|
||||
if (is_GNEXT_BIOS(ROM + Multi.cartOffsetA, Multi.cartSizeA))
|
||||
if (is_BSCartSA1_BIOS(ROM + Multi.cartOffsetA, Multi.cartSizeA))
|
||||
Multi.cartType = 5;
|
||||
else
|
||||
if (is_BSCart_BIOS(ROM + Multi.cartOffsetA, Multi.cartSizeA))
|
||||
Multi.cartType = 3;
|
||||
}
|
||||
else
|
||||
if (Multi.cartSizeB)
|
||||
|
@ -1924,11 +1941,8 @@ bool8 CMemory::LoadMultiCartInt ()
|
|||
break;
|
||||
|
||||
case 3:
|
||||
r = LoadSameGame();
|
||||
break;
|
||||
|
||||
case 5:
|
||||
r = LoadGNEXT();
|
||||
r = LoadBSCart();
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -1992,26 +2006,31 @@ bool8 CMemory::LoadSufamiTurbo ()
|
|||
return (TRUE);
|
||||
}
|
||||
|
||||
bool8 CMemory::LoadSameGame ()
|
||||
bool8 CMemory::LoadBSCart ()
|
||||
{
|
||||
Multi.sramA = SRAM;
|
||||
Multi.sramB = NULL;
|
||||
|
||||
Multi.sramSizeA = ROM[0xffd8];
|
||||
if (LoROM)
|
||||
Multi.sramSizeA = ROM[0x7fd8];
|
||||
else
|
||||
Multi.sramSizeA = ROM[0xffd8];
|
||||
|
||||
Multi.sramMaskA = Multi.sramSizeA ? ((1 << (Multi.sramSizeA + 3)) * 128 - 1) : 0;
|
||||
Multi.sramSizeB = 0;
|
||||
Multi.sramMaskB = 0;
|
||||
|
||||
if (Multi.cartSizeB)
|
||||
{
|
||||
if (!is_SameGame_Add_On(ROM + Multi.cartOffsetB, Multi.cartSizeB))
|
||||
Multi.cartSizeB = 0;
|
||||
}
|
||||
|
||||
LoROM = FALSE;
|
||||
HiROM = TRUE;
|
||||
CalculatedSize = Multi.cartSizeA;
|
||||
|
||||
if (Multi.cartSizeB == 0 && Multi.cartSizeA <= (MAX_ROM_SIZE - 0x100000 - Multi.cartOffsetA))
|
||||
{
|
||||
//Initialize 1MB Empty Memory Pack only if cart B is cleared
|
||||
//It does not make a Memory Pack if game is loaded like a normal ROM
|
||||
Multi.cartOffsetB = Multi.cartOffsetA + CalculatedSize;
|
||||
Multi.cartSizeB = 0x100000;
|
||||
memset(Memory.ROM + Multi.cartOffsetB, 0xFF, 0x100000);
|
||||
}
|
||||
|
||||
return (TRUE);
|
||||
}
|
||||
|
||||
|
@ -2220,6 +2239,32 @@ bool8 CMemory::SaveSRAM (const char *filename)
|
|||
return (FALSE);
|
||||
}
|
||||
|
||||
bool8 CMemory::SaveMPAK (const char *filename)
|
||||
{
|
||||
if (Settings.BS || (Multi.cartSizeB && (Multi.cartType == 3)))
|
||||
{
|
||||
FILE *file;
|
||||
int size;
|
||||
char mempakName[PATH_MAX + 1];
|
||||
|
||||
strcpy(mempakName, filename);
|
||||
size = 0x100000;
|
||||
if (size)
|
||||
{
|
||||
file = fopen(mempakName, "wb");
|
||||
if (file)
|
||||
{
|
||||
size_t ignore;
|
||||
ignore = fwrite((char *)Memory.ROM + Multi.cartOffsetB, size, 1, file);
|
||||
fclose(file);
|
||||
|
||||
return (TRUE);
|
||||
}
|
||||
}
|
||||
}
|
||||
return (FALSE);
|
||||
}
|
||||
|
||||
// initialization
|
||||
|
||||
static uint32 caCRC32 (uint8 *array, uint32 size, uint32 crc32)
|
||||
|
@ -2566,7 +2611,7 @@ void CMemory::InitROM (void)
|
|||
Map_ExtendedHiROMMap();
|
||||
else
|
||||
if (Multi.cartType == 3)
|
||||
Map_SameGameHiROMMap();
|
||||
Map_BSCartHiROMMap();
|
||||
else
|
||||
Map_HiROMMap();
|
||||
}
|
||||
|
@ -2584,7 +2629,7 @@ void CMemory::InitROM (void)
|
|||
if (Settings.SA1)
|
||||
{
|
||||
if (Multi.cartType == 5)
|
||||
Map_GNEXTSA1LoROMMap();
|
||||
Map_BSSA1LoROMMap();
|
||||
else
|
||||
Map_SA1LoROMMap();
|
||||
}
|
||||
|
@ -2598,6 +2643,13 @@ void CMemory::InitROM (void)
|
|||
if (strncmp(ROMName, "WANDERERS FROM YS", 17) == 0)
|
||||
Map_NoMAD1LoROMMap();
|
||||
else
|
||||
if (Multi.cartType == 3)
|
||||
if (strncmp(ROMName, "SOUND NOVEL-TCOOL", 17) == 0 ||
|
||||
strncmp(ROMName, "DERBY STALLION 96", 17) == 0)
|
||||
Map_BSCartLoROMMap(1);
|
||||
else
|
||||
Map_BSCartLoROMMap(0);
|
||||
else
|
||||
if (strncmp(ROMName, "SOUND NOVEL-TCOOL", 17) == 0 ||
|
||||
strncmp(ROMName, "DERBY STALLION 96", 17) == 0)
|
||||
Map_ROM24MBSLoROMMap();
|
||||
|
@ -3269,9 +3321,9 @@ void CMemory::Map_SA1LoROMMap (void)
|
|||
BWRAM = SRAM;
|
||||
}
|
||||
|
||||
void CMemory::Map_GNEXTSA1LoROMMap (void)
|
||||
void CMemory::Map_BSSA1LoROMMap(void)
|
||||
{
|
||||
printf("Map_GNEXTSA1LoROMMap\n");
|
||||
printf("Map_BSSA1LoROMMap\n");
|
||||
map_System();
|
||||
|
||||
map_lorom_offset(0x00, 0x3f, 0x8000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
|
@ -3287,9 +3339,6 @@ void CMemory::Map_GNEXTSA1LoROMMap (void)
|
|||
for (int c = 0x40; c < 0x80; c++)
|
||||
map_space(c, c, 0x0000, 0xffff, SRAM + (c & 1) * 0x10000);
|
||||
|
||||
// FIXME: untested!
|
||||
map_hirom_offset(0x70, 0x7f, 0x0000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
|
||||
map_WRAM();
|
||||
|
||||
map_WriteProtectROM();
|
||||
|
@ -3349,26 +3398,6 @@ void CMemory::Map_ExtendedHiROMMap (void)
|
|||
map_WriteProtectROM();
|
||||
}
|
||||
|
||||
void CMemory::Map_SameGameHiROMMap (void)
|
||||
{
|
||||
printf("Map_SameGameHiROMMap\n");
|
||||
map_System();
|
||||
|
||||
map_hirom_offset(0x00, 0x1f, 0x8000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
map_hirom_offset(0x20, 0x3f, 0x8000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
map_hirom_offset(0x60, 0x7f, 0x0000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
map_hirom_offset(0x80, 0x9f, 0x8000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
map_hirom_offset(0xa0, 0xbf, 0x8000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
map_hirom_offset(0xc0, 0xdf, 0x0000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
map_hirom_offset(0xe0, 0xff, 0x0000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
|
||||
map_HiROMSRAM();
|
||||
map_WRAM();
|
||||
|
||||
map_WriteProtectROM();
|
||||
}
|
||||
|
||||
void CMemory::Map_SPC7110HiROMMap (void)
|
||||
{
|
||||
printf("Map_SPC7110HiROMMap\n");
|
||||
|
@ -3387,6 +3416,71 @@ void CMemory::Map_SPC7110HiROMMap (void)
|
|||
map_WriteProtectROM();
|
||||
}
|
||||
|
||||
void CMemory::Map_BSCartLoROMMap(uint8 mapping)
|
||||
{
|
||||
printf("Map_BSCartLoROMMap\n");
|
||||
|
||||
BSX.MMC[0x02] = 0x00;
|
||||
BSX.MMC[0x0C] = 0x80;
|
||||
|
||||
map_System();
|
||||
|
||||
if (mapping)
|
||||
{
|
||||
map_lorom_offset(0x00, 0x1f, 0x8000, 0xffff, 0x100000, 0);
|
||||
map_lorom_offset(0x20, 0x3f, 0x8000, 0xffff, 0x100000, 0x100000);
|
||||
map_lorom_offset(0x80, 0x9f, 0x8000, 0xffff, 0x100000, 0x200000);
|
||||
map_lorom_offset(0xa0, 0xbf, 0x8000, 0xffff, 0x100000, 0x100000);
|
||||
}
|
||||
else
|
||||
{
|
||||
map_lorom(0x00, 0x3f, 0x8000, 0xffff, CalculatedSize);
|
||||
map_lorom(0x40, 0x7f, 0x0000, 0x7fff, CalculatedSize);
|
||||
map_lorom(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize);
|
||||
map_lorom(0xc0, 0xff, 0x0000, 0x7fff, CalculatedSize);
|
||||
}
|
||||
|
||||
map_LoROMSRAM();
|
||||
map_index(0xc0, 0xef, 0x0000, 0xffff, MAP_BSX, MAP_TYPE_RAM);
|
||||
map_WRAM();
|
||||
|
||||
map_WriteProtectROM();
|
||||
}
|
||||
|
||||
void CMemory::Map_BSCartHiROMMap(void)
|
||||
{
|
||||
printf("Map_BSCartHiROMMap\n");
|
||||
|
||||
BSX.MMC[0x02] = 0x80;
|
||||
BSX.MMC[0x0C] = 0x80;
|
||||
|
||||
map_System();
|
||||
map_hirom_offset(0x00, 0x1f, 0x8000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
map_hirom_offset(0x20, 0x3f, 0x8000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
map_hirom_offset(0x60, 0x7f, 0x0000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
map_hirom_offset(0x80, 0x9f, 0x8000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
map_hirom_offset(0xa0, 0xbf, 0x8000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
map_hirom_offset(0xc0, 0xdf, 0x0000, 0xffff, Multi.cartSizeA, Multi.cartOffsetA);
|
||||
|
||||
if ((ROM[Multi.cartOffsetB + 0xFF00] == 0x4D)
|
||||
&& (ROM[Multi.cartOffsetB + 0xFF02] == 0x50)
|
||||
&& ((ROM[Multi.cartOffsetB + 0xFF06] & 0xF0) == 0x70))
|
||||
{
|
||||
//Type 7 Memory Pack detection - if detected, emulate it as Mask ROM
|
||||
map_hirom_offset(0xe0, 0xff, 0x0000, 0xffff, Multi.cartSizeB, Multi.cartOffsetB);
|
||||
}
|
||||
else
|
||||
{
|
||||
map_index(0xe0, 0xff, 0x0000, 0xffff, MAP_BSX, MAP_TYPE_RAM);
|
||||
}
|
||||
|
||||
map_HiROMSRAM();
|
||||
map_WRAM();
|
||||
|
||||
map_WriteProtectROM();
|
||||
}
|
||||
|
||||
// checksum
|
||||
|
||||
uint16 CMemory::checksum_calc_sum (uint8 *data, uint32 length)
|
||||
|
|
8
memmap.h
8
memmap.h
|
@ -293,13 +293,14 @@ struct CMemory
|
|||
bool8 LoadMultiCart (const char *, const char *);
|
||||
bool8 LoadMultiCartInt ();
|
||||
bool8 LoadSufamiTurbo ();
|
||||
bool8 LoadSameGame ();
|
||||
bool8 LoadBSCart ();
|
||||
bool8 LoadGNEXT ();
|
||||
bool8 LoadSRAM (const char *);
|
||||
bool8 SaveSRAM (const char *);
|
||||
void ClearSRAM (bool8 onlyNonSavedSRAM = 0);
|
||||
bool8 LoadSRTC (void);
|
||||
bool8 SaveSRTC (void);
|
||||
bool8 SaveMPAK (const char *);
|
||||
|
||||
char * Safe (const char *);
|
||||
char * SafeANK (const char *);
|
||||
|
@ -335,11 +336,12 @@ struct CMemory
|
|||
void Map_SetaDSPLoROMMap (void);
|
||||
void Map_SDD1LoROMMap (void);
|
||||
void Map_SA1LoROMMap (void);
|
||||
void Map_GNEXTSA1LoROMMap (void);
|
||||
void Map_BSSA1LoROMMap (void);
|
||||
void Map_HiROMMap (void);
|
||||
void Map_ExtendedHiROMMap (void);
|
||||
void Map_SameGameHiROMMap (void);
|
||||
void Map_SPC7110HiROMMap (void);
|
||||
void Map_BSCartLoROMMap(uint8);
|
||||
void Map_BSCartHiROMMap(void);
|
||||
|
||||
uint16 checksum_calc_sum (uint8 *, uint32);
|
||||
uint16 checksum_mirror_sum (uint8 *, uint32 &, uint32 mask = 0x800000);
|
||||
|
|
33
sa1.cpp
33
sa1.cpp
|
@ -313,7 +313,16 @@ static void S9xSetSA1MemMap (uint32 which1, uint8 map)
|
|||
|
||||
for (int c = 0; c < 0x100; c += 16)
|
||||
{
|
||||
uint8 *block = &Memory.ROM[(map & 7) * 0x100000 + (c << 12)];
|
||||
uint8 *block;
|
||||
if (Multi.cartType != 5)
|
||||
block = &Memory.ROM[(map & 7) * 0x100000 + (c << 12)];
|
||||
else
|
||||
{
|
||||
if ((map & 7) < 4)
|
||||
block = Memory.ROM + Multi.cartOffsetA + ((map & 7) * 0x100000 + (c << 12));
|
||||
else
|
||||
block = Memory.ROM + Multi.cartOffsetB + (((map & 7) - 4) * 0x100000 + (c << 12));
|
||||
}
|
||||
for (int i = c; i < c + 16; i++)
|
||||
Memory.Map[start + i] = SA1.Map[start + i] = block;
|
||||
}
|
||||
|
@ -321,8 +330,26 @@ static void S9xSetSA1MemMap (uint32 which1, uint8 map)
|
|||
for (int c = 0; c < 0x200; c += 16)
|
||||
{
|
||||
// conversion to int is needed here - map is promoted but which1 is not
|
||||
int32 offset = (((map & 0x80) ? map : which1) & 7) * 0x100000 + (c << 11) - 0x8000;
|
||||
uint8 *block = &Memory.ROM[offset];
|
||||
int32 offset;
|
||||
uint8 *block;
|
||||
if (Multi.cartType != 5)
|
||||
{
|
||||
offset = (((map & 0x80) ? map : which1) & 7) * 0x100000 + (c << 11) - 0x8000;
|
||||
block = &Memory.ROM[offset];
|
||||
}
|
||||
else
|
||||
{
|
||||
if ((map & 7) < 4)
|
||||
{
|
||||
offset = (((map & 0x80) ? map : which1) & 7) * 0x100000 + (c << 11) - 0x8000;
|
||||
block = Memory.ROM + Multi.cartOffsetA + offset;
|
||||
}
|
||||
else
|
||||
{
|
||||
offset = (((map & 0x80) ? (map - 4) : which1) & 7) * 0x100000 + (c << 11) - 0x8000;
|
||||
block = Memory.ROM + Multi.cartOffsetB + offset;
|
||||
}
|
||||
}
|
||||
for (int i = c + 8; i < c + 16; i++)
|
||||
Memory.Map[start2 + i] = SA1.Map[start2 + i] = block;
|
||||
}
|
||||
|
|
|
@ -496,13 +496,14 @@
|
|||
#define ID_WINDOW_SIZE_4X 40172
|
||||
#define ID_DEBUG_APU_TRACE 40173
|
||||
#define ID_EMULATION_BACKGROUNDINPUT 40174
|
||||
#define ID_SAVEMEMPACK 40175
|
||||
|
||||
// Next default values for new objects
|
||||
//
|
||||
#ifdef APSTUDIO_INVOKED
|
||||
#ifndef APSTUDIO_READONLY_SYMBOLS
|
||||
#define _APS_NEXT_RESOURCE_VALUE 151
|
||||
#define _APS_NEXT_COMMAND_VALUE 40175
|
||||
#define _APS_NEXT_COMMAND_VALUE 40176
|
||||
#define _APS_NEXT_CONTROL_VALUE 3018
|
||||
#define _APS_NEXT_SYMED_VALUE 101
|
||||
#endif
|
||||
|
|
|
@ -823,6 +823,7 @@ BEGIN
|
|||
MENUITEM "S&ave SPC Data", ID_FILE_SAVE_SPC_DATA
|
||||
MENUITEM "Save Screenshot", ID_SAVESCREENSHOT
|
||||
MENUITEM "Sa&ve S-RAM Data", ID_FILE_SAVE_SRAM_DATA
|
||||
MENUITEM "Save Memory Pack", ID_SAVEMEMPACK
|
||||
END
|
||||
MENUITEM "ROM Information...", IDM_ROM_INFO
|
||||
MENUITEM SEPARATOR
|
||||
|
|
|
@ -597,6 +597,8 @@ Nintendo is a trade mark.")
|
|||
|
||||
#define INFO_SAVE_SPC "Saving SPC Data."
|
||||
|
||||
#define MPAK_SAVE_FAILED "Failed to save Memory Pack."
|
||||
|
||||
#define CHEATS_INFO_ENABLED "Cheats enabled."
|
||||
#define CHEATS_INFO_DISABLED "Cheats disabled."
|
||||
#define CHEATS_INFO_ENABLED_NONE "Cheats enabled. (None are active.)"
|
||||
|
|
|
@ -2248,6 +2248,17 @@ LRESULT CALLBACK WinProc(
|
|||
if(!success)
|
||||
S9xMessage(S9X_ERROR, S9X_FREEZE_FILE_INFO, SRM_SAVE_FAILED);
|
||||
} break;
|
||||
case ID_SAVEMEMPACK: {
|
||||
const char *filename = S9xGetFilenameInc(".bs", SRAM_DIR);
|
||||
bool8 success = Memory.SaveMPAK(filename);
|
||||
if (!success)
|
||||
S9xMessage(S9X_ERROR, 0, MPAK_SAVE_FAILED);
|
||||
else
|
||||
{
|
||||
sprintf(String, "Saved Memory Pack %s", filename);
|
||||
S9xMessage(S9X_INFO, 0, String);
|
||||
}
|
||||
} break;
|
||||
case ID_FILE_RESET:
|
||||
#ifdef NETPLAY_SUPPORT
|
||||
if (Settings.NetPlayServer)
|
||||
|
@ -7006,6 +7017,7 @@ void MakeExtFile(void)
|
|||
|
||||
out<<"smcN"<<endl<<"zipY"<<endl<<"gzY" <<endl<<"swcN"<<endl<<"figN"<<endl;
|
||||
out<<"sfcN"<<endl;
|
||||
out<<"bsN"<<endl;
|
||||
out<<"jmaY";
|
||||
out.close();
|
||||
SetFileAttributes(TEXT("Valid.Ext"), FILE_ATTRIBUTE_ARCHIVE|FILE_ATTRIBUTE_READONLY);
|
||||
|
|
Loading…
Reference in New Issue