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Add proper support for SuperFX 8MB ROM emulation 

This code adds support for SuperFX ROMS which use the extended 6MB CPU ROM region specified by the official SNES documentation. It's not super well-tested though.
This commit is contained in:
Yoshimaster96 2021-07-31 17:33:31 -05:00 committed by GitHub
parent 9398d21e01
commit 8980c6fc32
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 51 additions and 13 deletions
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2
fxemu.cpp
View File

@ -196,7 +196,7 @@ static void FxReset (struct FxInfo_s *psFxInfo)
else else
{ {
b %= GSU.nRomBanks * 2; b %= GSU.nRomBanks * 2;
GSU.apvRomBank[i] = &GSU.pvRom[(b << 16) + 0x200000]; GSU.apvRomBank[i] = &GSU.pvRom[(b << 16) + 0x800000];
} }
} }

60
memmap.cpp
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@ -1449,6 +1449,10 @@ bool8 CMemory::LoadROMInt (int32 ROMfillSize)
CalculatedSize = ((ROMfillSize + 0x1fff) / 0x2000) * 0x2000; CalculatedSize = ((ROMfillSize + 0x1fff) / 0x2000) * 0x2000;
if (CalculatedSize > 0x400000 && if (CalculatedSize > 0x400000 &&
(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1320 && // exclude SuperFX
(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1420 &&
(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1520 &&
(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x1A20 &&
(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x3423 && // exclude SA-1 (ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x3423 && // exclude SA-1
(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x3523 && (ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x3523 &&
(ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x4332 && // exclude S-DD1 (ROM[0x7fd5] + (ROM[0x7fd6] << 8)) != 0x4332 && // exclude S-DD1
@ -3066,24 +3070,58 @@ void CMemory::Map_SuperFXLoROMMap (void)
printf("Map_SuperFXLoROMMap\n"); printf("Map_SuperFXLoROMMap\n");
map_System(); map_System();
// Replicate the first 2Mb of the ROM at ROM + 2MB such that each 32K // Replicate the first 2Mb of the ROM at ROM + 8MB such that each 32K
// block is repeated twice in each 64K block. // block is repeated twice in each 64K block.
for (int c = 0; c < 64; c++) for (int c = 0; c < 64; c++)
{ {
memmove(&ROM[0x200000 + c * 0x10000], &ROM[c * 0x8000], 0x8000); memmove(&ROM[0x800000 + c * 0x10000], &ROM[c * 0x8000], 0x8000);
memmove(&ROM[0x208000 + c * 0x10000], &ROM[c * 0x8000], 0x8000); memmove(&ROM[0x808000 + c * 0x10000], &ROM[c * 0x8000], 0x8000);
} }
map_lorom(0x00, 0x3f, 0x8000, 0xffff, CalculatedSize); // Check GSU revision (not 100% accurate but it works)
map_lorom(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize); // GSU2
if (CalculatedSize > 0x400000)
{
map_lorom(0x00, 0x3f, 0x8000, 0xffff, 0x200000);
map_lorom_offset(0x80, 0xbf, 0x8000, 0xffff, 0x200000, 0x200000);
map_hirom_offset(0x40, 0x7f, 0x0000, 0xffff, CalculatedSize, 0); map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, 0x200000, 0);
map_hirom_offset(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize, 0); map_hirom_offset(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize - 0x400000, 0x400000);
map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000); map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000); map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
map_space(0x70, 0x70, 0x0000, 0xffff, SRAM); map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000); map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
}
else if (CalculatedSize > 0x200000)
{
map_lorom(0x00, 0x3f, 0x8000, 0xffff, 0x200000);
map_lorom_offset(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize - 0x200000, 0x200000);
map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, 0x200000, 0);
map_hirom_offset(0xc0, 0xff, 0x0000, 0xffff, CalculatedSize - 0x200000, 0x200000);
map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
}
// GSU1
else
{
map_lorom(0x00, 0x3f, 0x8000, 0xffff, CalculatedSize);
map_lorom(0x80, 0xbf, 0x8000, 0xffff, CalculatedSize);
map_hirom_offset(0x40, 0x5f, 0x0000, 0xffff, CalculatedSize, 0);
map_hirom_offset(0xc0, 0xdf, 0x0000, 0xffff, CalculatedSize, 0);
map_space(0x00, 0x3f, 0x6000, 0x7fff, SRAM - 0x6000);
map_space(0x80, 0xbf, 0x6000, 0x7fff, SRAM - 0x6000);
map_space(0x70, 0x70, 0x0000, 0xffff, SRAM);
map_space(0x71, 0x71, 0x0000, 0xffff, SRAM + 0x10000);
map_space(0xf0, 0xf0, 0x0000, 0xffff, SRAM);
map_space(0xf1, 0xf1, 0x0000, 0xffff, SRAM + 0x10000);
}
map_WRAM(); map_WRAM();

2
memmap.h
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@ -15,7 +15,7 @@
struct CMemory struct CMemory
{ {
enum enum
{ MAX_ROM_SIZE = 0x800000 }; { MAX_ROM_SIZE = 0xC00000 };
enum file_formats enum file_formats
{ FILE_ZIP, FILE_JMA, FILE_DEFAULT }; { FILE_ZIP, FILE_JMA, FILE_DEFAULT };