mirror of https://github.com/snes9xgit/snes9x.git
snapshot: Keep compatibility with version 11.
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cea5148166
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@ -410,7 +410,7 @@ static FreezeData SnapTimings[] =
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INT_ENTRY(6, NMITriggerPos),
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INT_ENTRY(6, WRAMRefreshPos),
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INT_ENTRY(6, RenderPos),
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DELETED_INT_ENTRY(6, 12, InterlaceField, 1),
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INT_ENTRY(6, InterlaceField),
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INT_ENTRY(6, DMACPUSync),
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INT_ENTRY(6, NMIDMADelay),
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INT_ENTRY(6, IRQFlagChanging),
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@ -1204,6 +1204,7 @@ void S9xFreezeToStream (STREAM stream)
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S9xControlPreSaveState(&ctl_snap);
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FreezeStruct(stream, "CTL", &ctl_snap, SnapControls, COUNT(SnapControls));
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Timings.InterlaceField = S9xInterlaceField();
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FreezeStruct(stream, "TIM", &Timings, SnapTimings, COUNT(SnapTimings));
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if (Settings.SuperFX)
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@ -13,7 +13,7 @@
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#define SNAPSHOT_VERSION_IRQ 7
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#define SNAPSHOT_VERSION_BAPU 8
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#define SNAPSHOT_VERSION_IRQ_2018 11 // irq changes were introduced earlier, since this we store NextIRQTimer directly
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#define SNAPSHOT_VERSION 12
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#define SNAPSHOT_VERSION 11
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#define SUCCESS 1
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#define WRONG_FORMAT (-1)
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1
snes9x.h
1
snes9x.h
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@ -180,6 +180,7 @@ struct STimings
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int32 IRQTriggerCycles;
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int32 WRAMRefreshPos;
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int32 RenderPos;
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bool8 InterlaceField;
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int32 DMACPUSync; // The cycles to synchronize DMA and CPU. Snes9x cannot emulate correctly.
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int32 NMIDMADelay; // The delay of NMI trigger after DMA transfers. Snes9x cannot emulate correctly.
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int32 IRQFlagChanging; // This value is just a hack.
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