diff --git a/c4.cpp b/c4.cpp
index ce406822..d586e79e 100644
--- a/c4.cpp
+++ b/c4.cpp
@@ -328,14 +328,3 @@ uint8 * S9xGetMemPointerC4 (uint16 Address)
return (NULL);
return (Memory.C4RAM - 0x6000 + (Address & 0xffff));
}
-
-#ifdef ZSNES_C4
-START_EXTERN_C
-
-void C4LoaDMem (char *C4RAM)
-{
- memmove(C4RAM + (READ_WORD(C4RAM + 0x1f45) & 0x1fff), C4GetMemPointer(READ_3WORD(C4RAM + 0x1f40)), READ_WORD(C4RAM + 0x1f43));
-}
-
-END_EXTERN_C
-#endif
diff --git a/c4.h b/c4.h
index 649d8bb3..9b4c6070 100644
--- a/c4.h
+++ b/c4.h
@@ -178,10 +178,6 @@
#ifndef _C4_H_
#define _C4_H_
-#ifdef ZSNES_C4
-START_EXTERN_C
-#endif
-
extern int16 C4WFXVal;
extern int16 C4WFYVal;
extern int16 C4WFZVal;
@@ -195,10 +191,6 @@ extern int16 C41FAngleRes;
extern int16 C41FDist;
extern int16 C41FDistVal;
-#ifdef ZSNES_C4
-extern uint8 *C4Ram;
-#endif
-
void C4TransfWireFrame (void);
void C4TransfWireFrame2 (void);
void C4CalcWireFrame (void);
@@ -208,11 +200,6 @@ void C4Op1F (void);
void S9xInitC4 (void);
void S9xSetC4 (uint8, uint16);
uint8 S9xGetC4 (uint16);
-
-#ifdef ZSNES_C4
-END_EXTERN_C
-#endif
-
uint8 * S9xGetBasePointerC4 (uint16);
uint8 * S9xGetMemPointerC4 (uint16);
diff --git a/cheats2.cpp b/cheats2.cpp
index d174c5cf..fc076b5b 100644
--- a/cheats2.cpp
+++ b/cheats2.cpp
@@ -186,12 +186,9 @@ static void S9xSetByteFree (uint8, uint32);
static uint8 S9xGetByteFree (uint32 address)
{
uint32 Cycles = CPU.Cycles;
- uint32 WaitAddress = CPU.WaitAddress;
uint8 byte;
byte = S9xGetByte(address);
-
- CPU.WaitAddress = WaitAddress;
CPU.Cycles = Cycles;
return (byte);
@@ -200,11 +197,8 @@ static uint8 S9xGetByteFree (uint32 address)
static void S9xSetByteFree (uint8 byte, uint32 address)
{
uint32 Cycles = CPU.Cycles;
- uint32 WaitAddress = CPU.WaitAddress;
S9xSetByte(byte, address);
-
- CPU.WaitAddress = WaitAddress;
CPU.Cycles = Cycles;
}
diff --git a/controls.cpp b/controls.cpp
index b34bf95b..5985781d 100644
--- a/controls.cpp
+++ b/controls.cpp
@@ -425,7 +425,6 @@ static const int ptrspeeds[4] = { 1, 1, 4, 8 };
S(ToggleBG2), \
S(ToggleBG3), \
S(ToggleEmuTurbo), \
- S(ToggleHDMA), \
S(ToggleSprites), \
S(ToggleTransparency) \
@@ -2454,11 +2453,6 @@ void S9xApplyCommand (s9xcommand_t cmd, int16 data1, int16 data2)
DisplayStateChange("Sprites", !(Settings.BG_Forced & 16));
break;
- case ToggleHDMA:
- Settings.DisableHDMA = !Settings.DisableHDMA;
- DisplayStateChange("HDMA emulation", !Settings.DisableHDMA);
- break;
-
case ToggleTransparency:
Settings.Transparency = !Settings.Transparency;
DisplayStateChange("Transparency effects", Settings.Transparency);
diff --git a/cpu.cpp b/cpu.cpp
index f2efb4ce..547a4469 100644
--- a/cpu.cpp
+++ b/cpu.cpp
@@ -208,12 +208,16 @@ static void S9xResetCPU (void)
static void S9xSoftResetCPU (void)
{
CPU.Cycles = 182; // Or 188. This is the cycle count just after the jump to the Reset Vector.
- CPU.PrevCycles = -1;
+ CPU.PrevCycles = CPU.Cycles;
CPU.V_Counter = 0;
CPU.Flags = CPU.Flags & (DEBUG_MODE_FLAG | TRACE_FLAG);
CPU.PCBase = NULL;
- CPU.IRQActive = FALSE;
- CPU.IRQPending = 0;
+ CPU.NMILine = FALSE;
+ CPU.IRQLine = FALSE;
+ CPU.IRQTransition = FALSE;
+ CPU.IRQLastState = FALSE;
+ CPU.IRQExternal = FALSE;
+ CPU.IRQPending = Timings.IRQPendCount;
CPU.MemSpeed = SLOW_ONE_CYCLE;
CPU.MemSpeedx2 = SLOW_ONE_CYCLE * 2;
CPU.FastROMSpeed = SLOW_ONE_CYCLE;
@@ -226,9 +230,6 @@ static void S9xSoftResetCPU (void)
CPU.WhichEvent = HC_RENDER_EVENT;
CPU.NextEvent = Timings.RenderPos;
CPU.WaitingForInterrupt = FALSE;
- CPU.WaitAddress = 0xffffffff;
- CPU.WaitCounter = 0;
- CPU.PBPCAtOpcodeStart = 0xffffffff;
CPU.AutoSaveTimer = 0;
CPU.SRAMModified = FALSE;
@@ -261,7 +262,6 @@ static void S9xSoftResetCPU (void)
ICPU.S9xOpcodes = S9xOpcodesE1;
ICPU.S9xOpLengths = S9xOpLengthsM1X1;
- ICPU.CPUExecuting = TRUE;
S9xUnpackStatus();
}
diff --git a/cpuexec.cpp b/cpuexec.cpp
index 1537aeaf..5b1656e1 100644
--- a/cpuexec.cpp
+++ b/cpuexec.cpp
@@ -187,102 +187,91 @@
#include "missing.h"
#endif
+static inline void S9xReschedule (void);
+
void S9xMainLoop (void)
{
for (;;)
{
- if (CPU.Flags)
+ if (CPU.NMILine)
{
- if (CPU.Flags & NMI_FLAG)
+ if (Timings.NMITriggerPos <= CPU.Cycles)
{
- if (Timings.NMITriggerPos <= CPU.Cycles)
+ CPU.NMILine = FALSE;
+ Timings.NMITriggerPos = 0xffff;
+ if (CPU.WaitingForInterrupt)
{
- CPU.Flags &= ~NMI_FLAG;
- Timings.NMITriggerPos = 0xffff;
- if (CPU.WaitingForInterrupt)
- {
- CPU.WaitingForInterrupt = FALSE;
- Registers.PCw++;
- }
-
- S9xOpcode_NMI();
+ CPU.WaitingForInterrupt = FALSE;
+ Registers.PCw++;
}
+
+ S9xOpcode_NMI();
}
-
- #ifdef DEBUGGER
- if ((CPU.Flags & BREAK_FLAG) && !(CPU.Flags & SINGLE_STEP_FLAG))
- {
- for (int Break = 0; Break != 6; Break++)
- {
- if (S9xBreakpoint[Break].Enabled &&
- S9xBreakpoint[Break].Bank == Registers.PB &&
- S9xBreakpoint[Break].Address == Registers.PCw)
- {
- if (S9xBreakpoint[Break].Enabled == 2)
- S9xBreakpoint[Break].Enabled = TRUE;
- else
- CPU.Flags |= DEBUG_MODE_FLAG;
- }
- }
- }
- #endif
-
- if (CPU.Flags & IRQ_FLAG)
- {
- if (CPU.IRQPending)
- // FIXME: In case of IRQ during WRAM refresh
- CPU.IRQPending--;
- else
- {
- if (CPU.WaitingForInterrupt)
- {
- CPU.WaitingForInterrupt = FALSE;
- Registers.PCw++;
- }
-
- if (CPU.IRQActive && !Settings.DisableIRQ)
- {
- if (!CheckFlag(IRQ))
- // in IRQ handler $4211 is supposed to be read, so IRQ_FLAG should be cleared.
- S9xOpcode_IRQ();
- }
- else
- CPU.Flags &= ~IRQ_FLAG;
- }
- }
-
- if (CPU.Flags & SCAN_KEYS_FLAG)
- break;
-
- #ifdef DEBUGGER
- if (CPU.Flags & DEBUG_MODE_FLAG)
- break;
-
- if (CPU.Flags & TRACE_FLAG)
- S9xTrace();
-
- if (CPU.Flags & SINGLE_STEP_FLAG)
- {
- CPU.Flags &= ~SINGLE_STEP_FLAG;
- CPU.Flags |= DEBUG_MODE_FLAG;
- }
- #endif
}
- #ifdef CPU_SHUTDOWN
- CPU.PBPCAtOpcodeStart = Registers.PBPC;
+ if (CPU.IRQTransition || CPU.IRQExternal)
+ {
+ if (CPU.IRQPending)
+ CPU.IRQPending--;
+ else
+ {
+ if (CPU.WaitingForInterrupt)
+ {
+ CPU.WaitingForInterrupt = FALSE;
+ Registers.PCw++;
+ }
+
+ CPU.IRQTransition = FALSE;
+ CPU.IRQPending = Timings.IRQPendCount;
+
+ if (!CheckFlag(IRQ))
+ S9xOpcode_IRQ();
+ }
+ }
+
+ #ifdef DEBUGGER
+ if ((CPU.Flags & BREAK_FLAG) && !(CPU.Flags & SINGLE_STEP_FLAG))
+ {
+ for (int Break = 0; Break != 6; Break++)
+ {
+ if (S9xBreakpoint[Break].Enabled &&
+ S9xBreakpoint[Break].Bank == Registers.PB &&
+ S9xBreakpoint[Break].Address == Registers.PCw)
+ {
+ if (S9xBreakpoint[Break].Enabled == 2)
+ S9xBreakpoint[Break].Enabled = TRUE;
+ else
+ CPU.Flags |= DEBUG_MODE_FLAG;
+ }
+ }
+ }
+
+ if (CPU.Flags & DEBUG_MODE_FLAG)
+ break;
+
+ if (CPU.Flags & TRACE_FLAG)
+ S9xTrace();
+
+ if (CPU.Flags & SINGLE_STEP_FLAG)
+ {
+ CPU.Flags &= ~SINGLE_STEP_FLAG;
+ CPU.Flags |= DEBUG_MODE_FLAG;
+ }
#endif
+ if (CPU.Flags & SCAN_KEYS_FLAG)
+ break;
+
register uint8 Op;
register struct SOpcodes *Opcodes;
- CPU.PrevCycles = CPU.Cycles;
-
if (CPU.PCBase)
{
Op = CPU.PCBase[Registers.PCw];
+ CPU.PrevCycles = CPU.Cycles;
CPU.Cycles += CPU.MemSpeed;
+ S9xCheckInterrupts();
Opcodes = ICPU.S9xOpcodes;
}
else
@@ -304,13 +293,8 @@ void S9xMainLoop (void)
Registers.PCw++;
(*Opcodes[Op].S9xOpcode)();
- if (SA1.Executing)
+ if (Settings.SA1)
S9xSA1MainLoop();
-
- #if (S9X_ACCURACY_LEVEL <= 2)
- while (CPU.Cycles >= CPU.NextEvent)
- S9xDoHEventProcessing();
- #endif
}
S9xPackStatus();
@@ -325,54 +309,54 @@ void S9xMainLoop (void)
}
}
-void S9xSetIRQ (uint32 source)
+static inline void S9xReschedule (void)
{
- CPU.IRQActive |= source;
- CPU.IRQPending = Timings.IRQPendCount;
- CPU.Flags |= IRQ_FLAG;
-
- if (CPU.WaitingForInterrupt)
+ switch (CPU.WhichEvent)
{
- // Force IRQ to trigger immediately after WAI -
- // Final Fantasy Mystic Quest crashes without this.
- CPU.WaitingForInterrupt = FALSE;
- Registers.PCw++;
+ case HC_HBLANK_START_EVENT:
+ CPU.WhichEvent = HC_HDMA_START_EVENT;
+ CPU.NextEvent = Timings.HDMAStart;
+ break;
+
+ case HC_HDMA_START_EVENT:
+ CPU.WhichEvent = HC_HCOUNTER_MAX_EVENT;
+ CPU.NextEvent = Timings.H_Max;
+ break;
+
+ case HC_HCOUNTER_MAX_EVENT:
+ CPU.WhichEvent = HC_HDMA_INIT_EVENT;
+ CPU.NextEvent = Timings.HDMAInit;
+ break;
+
+ case HC_HDMA_INIT_EVENT:
+ CPU.WhichEvent = HC_RENDER_EVENT;
+ CPU.NextEvent = Timings.RenderPos;
+ break;
+
+ case HC_RENDER_EVENT:
+ CPU.WhichEvent = HC_WRAM_REFRESH_EVENT;
+ CPU.NextEvent = Timings.WRAMRefreshPos;
+ break;
+
+ case HC_WRAM_REFRESH_EVENT:
+ CPU.WhichEvent = HC_HBLANK_START_EVENT;
+ CPU.NextEvent = Timings.HBlankStart;
+ break;
}
-
-#ifdef DEBUGGER
- S9xTraceMessage("--- /IRQ low");
-#endif
-}
-
-void S9xClearIRQ (uint32 source)
-{
- CPU.IRQActive &= ~source;
- if (!CPU.IRQActive)
- CPU.Flags &= ~IRQ_FLAG;
-
-#ifdef DEBUGGER
- S9xTraceMessage("--- /IRQ high");
-#endif
}
void S9xDoHEventProcessing (void)
{
#ifdef DEBUGGER
- static char eventname[13][32] =
+ static char eventname[7][32] =
{
"",
"HC_HBLANK_START_EVENT",
- "HC_IRQ_1_3_EVENT ",
"HC_HDMA_START_EVENT ",
- "HC_IRQ_3_5_EVENT ",
"HC_HCOUNTER_MAX_EVENT",
- "HC_IRQ_5_7_EVENT ",
"HC_HDMA_INIT_EVENT ",
- "HC_IRQ_7_9_EVENT ",
"HC_RENDER_EVENT ",
- "HC_IRQ_9_A_EVENT ",
- "HC_WRAM_REFRESH_EVENT",
- "HC_IRQ_A_1_EVENT "
+ "HC_WRAM_REFRESH_EVENT"
};
#endif
@@ -382,19 +366,13 @@ void S9xDoHEventProcessing (void)
eventname[CPU.WhichEvent], CPU.NextEvent, CPU.Cycles);
#endif
-#ifdef CPU_SHUTDOWN
- CPU.WaitCounter++;
-#endif
-
switch (CPU.WhichEvent)
{
case HC_HBLANK_START_EVENT:
- S9xCheckMissingHTimerPosition(Timings.HBlankStart);
S9xReschedule();
break;
case HC_HDMA_START_EVENT:
- S9xCheckMissingHTimerPosition(Timings.HDMAStart);
S9xReschedule();
if (PPU.HDMA && CPU.V_Counter <= PPU.ScreenHeight)
@@ -408,19 +386,16 @@ void S9xDoHEventProcessing (void)
break;
case HC_HCOUNTER_MAX_EVENT:
- #ifndef ZSNES_FX
if (Settings.SuperFX)
{
if (!SuperFX.oneLineDone)
S9xSuperFXExec();
SuperFX.oneLineDone = FALSE;
}
- #else
- S9xSuperFXExec();
- #endif
S9xAPUEndScanline();
CPU.Cycles -= Timings.H_Max;
+ CPU.PrevCycles -= Timings.H_Max;
S9xAPUSetReferenceTime(CPU.Cycles);
if ((Timings.NMITriggerPos != 0xffff) && (Timings.NMITriggerPos >= Timings.H_Max))
@@ -449,7 +424,7 @@ void S9xDoHEventProcessing (void)
// FIXME: reading $4210 will wait 2 cycles, then perform reading, then wait 4 more cycles.
Memory.FillRAM[0x4210] = Model->_5A22;
- CPU.Flags &= ~NMI_FLAG;
+ CPU.NMILine = FALSE;
Timings.NMITriggerPos = 0xffff;
ICPU.Frame++;
@@ -481,8 +456,6 @@ void S9xDoHEventProcessing (void)
else
Timings.WRAMRefreshPos = SNES_WRAM_REFRESH_HC_v1;
- S9xCheckMissingHTimerPosition(0);
-
if (CPU.V_Counter == PPU.ScreenHeight + FIRST_VISIBLE_LINE) // VBlank starts from V=225(240).
{
S9xEndScreenRefresh();
@@ -517,7 +490,7 @@ void S9xDoHEventProcessing (void)
{
// FIXME: triggered at HC=6, checked just before the final CPU cycle,
// then, when to call S9xOpcode_NMI()?
- CPU.Flags |= NMI_FLAG;
+ CPU.NMILine = TRUE;
Timings.NMITriggerPos = 6 + 6;
}
@@ -532,13 +505,11 @@ void S9xDoHEventProcessing (void)
if (CPU.V_Counter == FIRST_VISIBLE_LINE) // V=1
S9xStartScreenRefresh();
- CPU.NextEvent = -1;
S9xReschedule();
break;
case HC_HDMA_INIT_EVENT:
- S9xCheckMissingHTimerPosition(Timings.HDMAInit);
S9xReschedule();
if (CPU.V_Counter == 0)
@@ -555,7 +526,6 @@ void S9xDoHEventProcessing (void)
if (CPU.V_Counter >= FIRST_VISIBLE_LINE && CPU.V_Counter <= PPU.ScreenHeight)
RenderLine((uint8) (CPU.V_Counter - FIRST_VISIBLE_LINE));
- S9xCheckMissingHTimerPosition(Timings.RenderPos);
S9xReschedule();
break;
@@ -565,27 +535,12 @@ void S9xDoHEventProcessing (void)
S9xTraceFormattedMessage("*** WRAM Refresh HC:%04d", CPU.Cycles);
#endif
- S9xCheckMissingHTimerHalt(Timings.WRAMRefreshPos, SNES_WRAM_REFRESH_CYCLES);
+ CPU.PrevCycles = CPU.Cycles;
CPU.Cycles += SNES_WRAM_REFRESH_CYCLES;
-
- S9xCheckMissingHTimerPosition(Timings.WRAMRefreshPos);
- S9xReschedule();
-
- break;
-
- case HC_IRQ_1_3_EVENT:
- case HC_IRQ_3_5_EVENT:
- case HC_IRQ_5_7_EVENT:
- case HC_IRQ_7_9_EVENT:
- case HC_IRQ_9_A_EVENT:
- case HC_IRQ_A_1_EVENT:
- if (PPU.HTimerEnabled && (!PPU.VTimerEnabled || (CPU.V_Counter == PPU.VTimerPosition)))
- S9xSetIRQ(PPU_IRQ_SOURCE);
- else
- if (PPU.VTimerEnabled && (CPU.V_Counter == PPU.VTimerPosition))
- S9xSetIRQ(PPU_IRQ_SOURCE);
+ S9xCheckInterrupts();
S9xReschedule();
+
break;
}
diff --git a/cpuexec.h b/cpuexec.h
index b11cff61..ccfadd5c 100644
--- a/cpuexec.h
+++ b/cpuexec.h
@@ -179,6 +179,9 @@
#define _CPUEXEC_H_
#include "ppu.h"
+#ifdef DEBUGGER
+#include "debug.h"
+#endif
struct SOpcodes
{
@@ -193,7 +196,6 @@ struct SICPU
uint8 _Zero;
uint8 _Negative;
uint8 _Overflow;
- bool8 CPUExecuting;
uint32 ShiftedPB;
uint32 ShiftedDB;
uint32 Frame;
@@ -217,8 +219,6 @@ void S9xMainLoop (void);
void S9xReset (void);
void S9xSoftReset (void);
void S9xDoHEventProcessing (void);
-void S9xClearIRQ (uint32);
-void S9xSetIRQ (uint32);
static inline void S9xUnpackStatus (void)
{
@@ -270,84 +270,43 @@ static inline void S9xFixCycles (void)
}
}
-static inline void S9xReschedule (void)
+static inline void S9xCheckInterrupts (void)
{
- uint8 next = 0;
- int32 hpos = 0;
+ bool8 thisIRQ = PPU.HTimerEnabled || PPU.VTimerEnabled;
- switch (CPU.WhichEvent)
+ if (CPU.IRQLine && thisIRQ)
+ CPU.IRQTransition = TRUE;
+
+ if (PPU.HTimerEnabled)
{
- case HC_HBLANK_START_EVENT:
- case HC_IRQ_1_3_EVENT:
- next = HC_HDMA_START_EVENT;
- hpos = Timings.HDMAStart;
- break;
+ int32 htimepos = PPU.HTimerPosition;
+ if (CPU.Cycles >= Timings.H_Max)
+ htimepos += Timings.H_Max;
- case HC_HDMA_START_EVENT:
- case HC_IRQ_3_5_EVENT:
- next = HC_HCOUNTER_MAX_EVENT;
- hpos = Timings.H_Max;
- break;
-
- case HC_HCOUNTER_MAX_EVENT:
- case HC_IRQ_5_7_EVENT:
- next = HC_HDMA_INIT_EVENT;
- hpos = Timings.HDMAInit;
- break;
-
- case HC_HDMA_INIT_EVENT:
- case HC_IRQ_7_9_EVENT:
- next = HC_RENDER_EVENT;
- hpos = Timings.RenderPos;
- break;
-
- case HC_RENDER_EVENT:
- case HC_IRQ_9_A_EVENT:
- next = HC_WRAM_REFRESH_EVENT;
- hpos = Timings.WRAMRefreshPos;
- break;
-
- case HC_WRAM_REFRESH_EVENT:
- case HC_IRQ_A_1_EVENT:
- next = HC_HBLANK_START_EVENT;
- hpos = Timings.HBlankStart;
- break;
+ if (CPU.PrevCycles >= htimepos || CPU.Cycles < htimepos)
+ thisIRQ = FALSE;
}
- if (((int32) PPU.HTimerPosition > CPU.NextEvent) && ((int32) PPU.HTimerPosition < hpos))
+ if (PPU.VTimerEnabled)
{
- hpos = (int32) PPU.HTimerPosition;
+ int32 vcounter = CPU.V_Counter;
+ if (CPU.Cycles >= Timings.H_Max)
+ vcounter++;
- switch (next)
- {
- case HC_HDMA_START_EVENT:
- next = HC_IRQ_1_3_EVENT;
- break;
-
- case HC_HCOUNTER_MAX_EVENT:
- next = HC_IRQ_3_5_EVENT;
- break;
-
- case HC_HDMA_INIT_EVENT:
- next = HC_IRQ_5_7_EVENT;
- break;
-
- case HC_RENDER_EVENT:
- next = HC_IRQ_7_9_EVENT;
- break;
-
- case HC_WRAM_REFRESH_EVENT:
- next = HC_IRQ_9_A_EVENT;
- break;
-
- case HC_HBLANK_START_EVENT:
- next = HC_IRQ_A_1_EVENT;
- break;
- }
+ if (vcounter != PPU.VTimerPosition)
+ thisIRQ = FALSE;
}
- CPU.NextEvent = hpos;
- CPU.WhichEvent = next;
+ if (!CPU.IRQLastState && thisIRQ)
+ {
+#ifdef DEBUGGER
+ S9xTraceFormattedMessage("--- /IRQ High->Low prev HC:%04d curr HC:%04d HTimer:%d Pos:%04d VTimer:%d Pos:%03d",
+ CPU.PrevCycles, CPU.Cycles, PPU.HTimerEnabled, PPU.HTimerPosition, PPU.VTimerEnabled, PPU.VTimerPosition);
+#endif
+ CPU.IRQLine = TRUE;
+ }
+
+ CPU.IRQLastState = thisIRQ;
}
#endif
diff --git a/cpumacro.h b/cpumacro.h
index 9b1fc4cb..73c4340b 100644
--- a/cpumacro.h
+++ b/cpumacro.h
@@ -280,7 +280,6 @@ static void Op##OP (void) \
S9xSetPCBase(ICPU.ShiftedPB + newPC.W); \
else \
Registers.PCw = newPC.W; \
- CPUShutdown(); \
} \
}
@@ -515,9 +514,6 @@ static inline void CPY (uint8 val)
static inline void DEC16 (uint32 OpAddress, s9xwrap_t w)
{
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
uint16 Work16 = S9xGetWord(OpAddress, w) - 1;
AddCycles(ONE_CYCLE);
S9xSetWord(Work16, OpAddress, w, WRITE_10);
@@ -527,9 +523,6 @@ static inline void DEC16 (uint32 OpAddress, s9xwrap_t w)
static inline void DEC8 (uint32 OpAddress)
{
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
uint8 Work8 = S9xGetByte(OpAddress) - 1;
AddCycles(ONE_CYCLE);
S9xSetByte(Work8, OpAddress);
@@ -551,9 +544,6 @@ static inline void EOR (uint8 val)
static inline void INC16 (uint32 OpAddress, s9xwrap_t w)
{
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
uint16 Work16 = S9xGetWord(OpAddress, w) + 1;
AddCycles(ONE_CYCLE);
S9xSetWord(Work16, OpAddress, w, WRITE_10);
@@ -563,9 +553,6 @@ static inline void INC16 (uint32 OpAddress, s9xwrap_t w)
static inline void INC8 (uint32 OpAddress)
{
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
uint8 Work8 = S9xGetByte(OpAddress) + 1;
AddCycles(ONE_CYCLE);
S9xSetByte(Work8, OpAddress);
diff --git a/cpuops.cpp b/cpuops.cpp
index f9735475..d68cd37d 100644
--- a/cpuops.cpp
+++ b/cpuops.cpp
@@ -188,13 +188,9 @@
#endif
#ifdef SA1_OPCODES
-#define AddCycles(n) { }
+#define AddCycles(n) { SA1.Cycles += (n); }
#else
-#if (S9X_ACCURACY_LEVEL >= 3)
-#define AddCycles(n) { CPU.Cycles += (n); while (CPU.Cycles >= CPU.NextEvent) S9xDoHEventProcessing(); }
-#else
-#define AddCycles(n) { CPU.Cycles += (n); }
-#endif
+#define AddCycles(n) { CPU.PrevCycles = CPU.Cycles; CPU.Cycles += (n); S9xCheckInterrupts(); while (CPU.Cycles >= CPU.NextEvent) S9xDoHEventProcessing(); }
#endif
#include "cpuaddr.h"
@@ -659,9 +655,6 @@ rOPX (CCSlow, AbsoluteSlow, WRAP_NONE, CPY)
static void Op3AM1 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.AL--;
SetZN(Registers.AL);
}
@@ -669,9 +662,6 @@ static void Op3AM1 (void)
static void Op3AM0 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.A.W--;
SetZN(Registers.A.W);
}
@@ -679,9 +669,6 @@ static void Op3AM0 (void)
static void Op3ASlow (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
if (CheckMemory())
{
@@ -813,9 +800,6 @@ rOPM (53Slow, StackRelativeIndirectIndexedSlow, WRAP_NONE, EOR)
static void Op1AM1 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.AL++;
SetZN(Registers.AL);
}
@@ -823,9 +807,6 @@ static void Op1AM1 (void)
static void Op1AM0 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.A.W++;
SetZN(Registers.A.W);
}
@@ -833,9 +814,6 @@ static void Op1AM0 (void)
static void Op1ASlow (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
if (CheckMemory())
{
@@ -1550,54 +1528,6 @@ mOPM (0CSlow, AbsoluteSlow, WRAP_BANK, TSB)
/* Branch Instructions ***************************************************** */
-#ifdef CPU_SHUTDOWN
-
-#ifndef SA1_OPCODES
-
-inline void CPUShutdown (void)
-{
- if (Settings.Shutdown && Registers.PBPC == CPU.WaitAddress)
- {
- // Don't skip cycles with a pending NMI or IRQ - could cause delayed interrupt.
- if (CPU.WaitCounter == 0 && !(CPU.Flags & (IRQ_FLAG | NMI_FLAG)))
- {
- CPU.WaitAddress = 0xffffffff;
- if (Settings.SA1)
- S9xSA1ExecuteDuringSleep();
- CPU.Cycles = CPU.NextEvent;
- ICPU.CPUExecuting = FALSE;
- S9xAPUExecute();
- ICPU.CPUExecuting = TRUE;
- }
- else
- if (CPU.WaitCounter >= 2)
- CPU.WaitCounter = 1;
- else
- CPU.WaitCounter--;
- }
-}
-
-#else
-
-inline void CPUShutdown (void)
-{
- if (Settings.Shutdown && Registers.PBPC == CPU.WaitAddress)
- {
- if (CPU.WaitCounter >= 1)
- SA1.Executing = FALSE;
- else
- CPU.WaitCounter++;
- }
-}
-
-#endif
-
-#else
-
-#define CPUShutdown()
-
-#endif
-
// BCC
bOP(90E0, Relative, !CheckCarry(), 0, 0)
bOP(90E1, Relative, !CheckCarry(), 0, 1)
@@ -1692,7 +1622,7 @@ static void Op58 (void)
{
ClearIRQ();
AddCycles(ONE_CYCLE);
- //CHECK_FOR_IRQ();
+ CHECK_FOR_IRQ();
}
// SEI
@@ -1714,9 +1644,6 @@ static void OpB8 (void)
static void OpCAX1 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.XL--;
SetZN(Registers.XL);
}
@@ -1724,9 +1651,6 @@ static void OpCAX1 (void)
static void OpCAX0 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.X.W--;
SetZN(Registers.X.W);
}
@@ -1734,9 +1658,6 @@ static void OpCAX0 (void)
static void OpCASlow (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
if (CheckIndex())
{
@@ -1753,9 +1674,6 @@ static void OpCASlow (void)
static void Op88X1 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.YL--;
SetZN(Registers.YL);
}
@@ -1763,9 +1681,6 @@ static void Op88X1 (void)
static void Op88X0 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.Y.W--;
SetZN(Registers.Y.W);
}
@@ -1773,9 +1688,6 @@ static void Op88X0 (void)
static void Op88Slow (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
if (CheckIndex())
{
@@ -1794,9 +1706,6 @@ static void Op88Slow (void)
static void OpE8X1 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.XL++;
SetZN(Registers.XL);
}
@@ -1804,9 +1713,6 @@ static void OpE8X1 (void)
static void OpE8X0 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.X.W++;
SetZN(Registers.X.W);
}
@@ -1814,9 +1720,6 @@ static void OpE8X0 (void)
static void OpE8Slow (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
if (CheckIndex())
{
@@ -1833,9 +1736,6 @@ static void OpE8Slow (void)
static void OpC8X1 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.YL++;
SetZN(Registers.YL);
}
@@ -1843,9 +1743,6 @@ static void OpC8X1 (void)
static void OpC8X0 (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
Registers.Y.W++;
SetZN(Registers.Y.W);
}
@@ -1853,9 +1750,6 @@ static void OpC8X0 (void)
static void OpC8Slow (void)
{
AddCycles(ONE_CYCLE);
-#ifdef CPU_SHUTDOWN
- CPU.WaitAddress = 0xffffffff;
-#endif
if (CheckIndex())
{
@@ -2371,7 +2265,7 @@ static void Op28E1 (void)
SetFlags(MemoryFlag | IndexFlag);
S9xUnpackStatus();
S9xFixCycles();
- //CHECK_FOR_IRQ();
+ CHECK_FOR_IRQ();
}
static void Op28E0 (void)
@@ -2388,7 +2282,7 @@ static void Op28E0 (void)
}
S9xFixCycles();
- //CHECK_FOR_IRQ();
+ CHECK_FOR_IRQ();
}
static void Op28Slow (void)
@@ -2416,7 +2310,7 @@ static void Op28Slow (void)
}
S9xFixCycles();
- //CHECK_FOR_IRQ();
+ CHECK_FOR_IRQ();
}
// PLX
@@ -3069,17 +2963,11 @@ static void Op5CSlow (void)
static void Op4C (void)
{
S9xSetPCBase(ICPU.ShiftedPB + ((uint16) Absolute(JUMP)));
-#if defined(CPU_SHUTDOWN) && defined(SA1_OPCODES)
- CPUShutdown();
-#endif
}
static void Op4CSlow (void)
{
S9xSetPCBase(ICPU.ShiftedPB + ((uint16) AbsoluteSlow(JUMP)));
-#if defined(CPU_SHUTDOWN) && defined(SA1_OPCODES)
- CPUShutdown();
-#endif
}
static void Op6C (void)
@@ -3425,7 +3313,7 @@ static void OpC2 (void)
}
S9xFixCycles();
- //CHECK_FOR_IRQ();
+ CHECK_FOR_IRQ();
}
static void OpC2Slow (void)
@@ -3454,7 +3342,7 @@ static void OpC2Slow (void)
}
S9xFixCycles();
- //CHECK_FOR_IRQ();
+ CHECK_FOR_IRQ();
}
static void OpE2 (void)
@@ -3562,7 +3450,7 @@ static void Op40Slow (void)
}
S9xFixCycles();
- //CHECK_FOR_IRQ();
+ CHECK_FOR_IRQ();
}
/* STP/WAI ***************************************************************** */
@@ -3570,44 +3458,15 @@ static void Op40Slow (void)
// WAI
static void OpCB (void)
{
- // Ok, let's just C-ify the ASM versions separately.
#ifdef SA1_OPCODES
SA1.WaitingForInterrupt = TRUE;
Registers.PCw--;
-#if 0
- // XXX: FIXME
- if (Settings.Shutdown)
- {
- SA1.Cycles = SA1.NextEvent;
- SA1.Executing = FALSE;
- //S9xAPUExecute(); // FIXME
- SA1.Executing = TRUE;
- }
+ AddCycles(TWO_CYCLES);
+#else
+ CPU.WaitingForInterrupt = TRUE;
+ Registers.PCw--;
+ AddCycles(TWO_CYCLES);
#endif
-#else // SA1_OPCODES
-#if 0
- if (CPU.IRQActive)
- AddCycles(TWO_CYCLES);
- else
-#endif
- {
- CPU.WaitingForInterrupt = TRUE;
- Registers.PCw--;
- #ifdef CPU_SHUTDOWN
- if (Settings.Shutdown)
- {
- CPU.Cycles = CPU.NextEvent;
- ICPU.CPUExecuting = FALSE;
- S9xAPUExecute();
- ICPU.CPUExecuting = TRUE;
- }
- else
- AddCycles(TWO_CYCLES);
- #else
- AddCycles(TWO_CYCLES);
-#endif
- }
-#endif // SA1_OPCODES
}
// STP
diff --git a/cpuops.h b/cpuops.h
index acb34060..d9bfcc1e 100644
--- a/cpuops.h
+++ b/cpuops.h
@@ -181,8 +181,9 @@
void S9xOpcode_NMI (void);
void S9xOpcode_IRQ (void);
-#define CHECK_FOR_IRQ() \
-if (CPU.IRQActive && !CheckFlag(IRQ) && !Settings.DisableIRQ) \
- S9xOpcode_IRQ()
-
+#ifndef SA1_OPCODES
+#define CHECK_FOR_IRQ() {} // if (CPU.IRQLine) S9xOpcode_IRQ(); }
+#else
+#define CHECK_FOR_IRQ() {}
+#endif
#endif
diff --git a/debug.cpp b/debug.cpp
index 1a5a3894..b2151d62 100644
--- a/debug.cpp
+++ b/debug.cpp
@@ -872,7 +872,7 @@ static uint8 debug_cpu_op_print (char *Line, uint8 Bank, uint16 Address)
break;
}
- sprintf(Line, "%-44s A:%04X X:%04X Y:%04X D:%04X DB:%02X S:%04X P:%c%c%c%c%c%c%c%c%c HC:%04ld VC:%03ld FC:%02d %02x",
+ sprintf(Line, "%-44s A:%04X X:%04X Y:%04X D:%04X DB:%02X S:%04X P:%c%c%c%c%c%c%c%c%c HC:%04ld VC:%03ld FC:%02d %03x",
Line, Registers.A.W, Registers.X.W, Registers.Y.W,
Registers.D.W, Registers.DB, Registers.S.W,
CheckEmulation() ? 'E' : 'e',
@@ -887,7 +887,7 @@ static uint8 debug_cpu_op_print (char *Line, uint8 Bank, uint16 Address)
(long) CPU.Cycles,
(long) CPU.V_Counter,
IPPU.FrameCount,
- CPU.IRQActive);
+ (CPU.IRQExternal ? 0x100 : 0) | (PPU.HTimerEnabled ? 0x10 : 0) | (PPU.VTimerEnabled ? 0x01 : 0));
return (Size);
}
diff --git a/dma.cpp b/dma.cpp
index bd2c6f22..bf171090 100644
--- a/dma.cpp
+++ b/dma.cpp
@@ -185,7 +185,7 @@
#include "missing.h"
#endif
-#define ADD_CYCLES(n) CPU.Cycles += (n)
+#define ADD_CYCLES(n) { CPU.PrevCycles = CPU.Cycles; CPU.Cycles += (n); S9xCheckInterrupts(); }
extern uint8 *HDMAMemPointers[8];
extern int HDMA_ModeByteCounts[8];
@@ -741,9 +741,6 @@ bool8 S9xDoDMA (uint8 Channel)
break;
case 0x18: // VMDATAL
- #ifndef CORRECT_VRAM_READS
- IPPU.FirstVRAMRead = TRUE;
- #endif
if (!PPU.VMA.FullGraphicCount)
{
do
@@ -766,9 +763,6 @@ bool8 S9xDoDMA (uint8 Channel)
break;
case 0x19: // VMDATAH
- #ifndef CORRECT_VRAM_READS
- IPPU.FirstVRAMRead = TRUE;
- #endif
if (!PPU.VMA.FullGraphicCount)
{
do
@@ -837,9 +831,6 @@ bool8 S9xDoDMA (uint8 Channel)
if (d->BAddress == 0x18)
{
// VMDATAL
- #ifndef CORRECT_VRAM_READS
- IPPU.FirstVRAMRead = TRUE;
- #endif
if (!PPU.VMA.FullGraphicCount)
{
switch (b)
@@ -1282,7 +1273,7 @@ bool8 S9xDoDMA (uint8 Channel)
}
}
- if ((CPU.Flags & NMI_FLAG) && (Timings.NMITriggerPos != 0xffff))
+ if (CPU.NMILine && (Timings.NMITriggerPos != 0xffff))
{
Timings.NMITriggerPos = CPU.Cycles + Timings.NMIDMADelay;
if (Timings.NMITriggerPos >= Timings.H_Max)
@@ -1373,10 +1364,7 @@ static inline bool8 HDMAReadLineCount (int d)
void S9xStartHDMA (void)
{
- if (Settings.DisableHDMA)
- PPU.HDMA = 0;
- else
- PPU.HDMA = Memory.FillRAM[0x420c];
+ PPU.HDMA = Memory.FillRAM[0x420c];
#ifdef DEBUGGER
missing.hdma_this_frame = PPU.HDMA;
diff --git a/docs/porting.html b/docs/porting.html
index 9c62e23c..a2d3d49e 100644
--- a/docs/porting.html
+++ b/docs/porting.html
@@ -12,7 +12,7 @@
How to Port Snes9x to a New Platform
- Version: 1.52
+ Version: 1.53
(c) Copyright 1998 Gary Henderson
Introduction
@@ -56,22 +56,10 @@
Define this if your compiler uses shift right arithmetic for signed values. For example, GCC and Visual C++ use shift right arithmetic.
- CPU_SHUTDOWN
-
- This is a speed-up hack. When defined and if Settings.ShutdownMaster is true, Snes9x starts watching for when CPU is in a simply loop waiting for a known event to happen - like the end of the current scanline. If Snes9x spots CPU in such a loop, it simply skips the emulation of its instructions until the event happens. It can be a big win with lots of SNES games, but will break a small number of games. In this case, set Settings.ShutdownMaster to false before you load a ROM image. Note that this hack is forcibly disabled in some games. See Memory.ApplyROMFixes function for the list of such games.
-
- CORRECT_VRAM_READS
-
- You must define this. It allows correct VRAM reads.
-
ZLIB / UNZIP_SUPPORT / JMA_SUPPORT
Define these if you want to support GZIP/ZIP/JMA compressed ROM images and GZIP compressed freeze-game files.
- ZSNES_FX / ZSNES_C4
-
- Define these if your CPU is x86 compatible and you're going to use the ZSNES Super FX and C4 assembler codes.
-
USE_OPENGL
Define this and set Settings.OpenGLEnable to true, then you'll get the rendered SNES image as one OpenGL texture.
@@ -81,9 +69,7 @@
ZLIB
UNZIP_SUPPORT
JMA_SUPPORT
- CPU_SHUTDOWN
RIGHTSHIFT_IS_SAR
- CORRECT_VRAM_READS
Editing port.h
@@ -379,7 +365,7 @@
The sound generation rate on a SNES is directly proportional to the video output rate. Displays that synchronize with the vertical refresh but have a slightly lower refresh-rate than the emulated system can experience sound drop-outs. It may be beneficial to provide an option for users to configure Settings.SoundInputRate to suit their own systems. Setting Settings.SoundInputRate to a value that matches the actual output rate (i.e. 31977hz for 59.96hz) or lower will allow the users to eliminate crackling. A range of 31000hz to 33000hz should be inclusive enough for all displays. Use of this setting paired with the S9xSyncSound function can eliminate sound discontinuity.
- Updated most recently by: 2009/12/20 zones
+ Updated most recently by: 2011/1/16 zones