From 7df5eaeaf18805eb39a1954fe9b9baf5cfe3a7d2 Mon Sep 17 00:00:00 2001
From: Brandon Wright <bearoso@gmail.com>
Date: Wed, 27 Feb 2019 18:29:54 -0600
Subject: [PATCH] Revert "APU: Seemingly obvious optimization."

This reverts commit f24ca1f8a2393457e8f135534e9b1a8b2ade9a86.
---
 apu/bapu/smp/core.cpp | 19 +++----------------
 apu/bapu/smp/smp.hpp  |  3 ---
 2 files changed, 3 insertions(+), 19 deletions(-)

diff --git a/apu/bapu/smp/core.cpp b/apu/bapu/smp/core.cpp
index 80508347..bbaf3ba6 100644
--- a/apu/bapu/smp/core.cpp
+++ b/apu/bapu/smp/core.cpp
@@ -37,27 +37,14 @@ void SMP::op_write(uint16 addr, uint8 data) {
   apuram[addr] = data;  //all writes go to RAM, even MMIO writes
 }
 
-uint8 SMP::op_readpc() {
-  tick();
-  if (regs.pc >= 0xffc0 && status.iplrom_enable) return iplrom[regs.pc++ & 0x3f];
-  return apuram[regs.pc++];
-}
-
-uint8 SMP::op_readstack() {
-  tick();
-  return apuram[0x0100 | ++regs.sp];
-}
-
-void SMP::op_writestack(uint8 data) {
-  tick();
-  apuram[0x0100 | regs.sp--] = data;
-}
-
 void SMP::op_step() {
+  #define op_readpc() op_read(regs.pc++)
   #define op_readdp(addr) op_read((regs.p.p << 8) + ((addr) & 0xff))
   #define op_writedp(addr, data) op_write((regs.p.p << 8) + ((addr) & 0xff), data)
   #define op_readaddr(addr) op_read(addr)
   #define op_writeaddr(addr, data) op_write(addr, data)
+  #define op_readstack() op_read(0x0100 | ++regs.sp)
+  #define op_writestack(data) op_write(0x0100 | regs.sp--, data)
 
   if(opcode_cycle == 0)
   {
diff --git a/apu/bapu/smp/smp.hpp b/apu/bapu/smp/smp.hpp
index 19c0f74c..5596c1f2 100644
--- a/apu/bapu/smp/smp.hpp
+++ b/apu/bapu/smp/smp.hpp
@@ -94,9 +94,6 @@ public:
   debugvirtual alwaysinline uint8 op_read(uint16 addr);
   debugvirtual alwaysinline void op_write(uint16 addr, uint8 data);
   debugvirtual alwaysinline void op_step();
-  alwaysinline uint8 op_readpc();
-  alwaysinline uint8 op_readstack();
-  alwaysinline void op_writestack(uint8 data);
   static const unsigned cycle_count_table[256];
   uint64 cycle_table_cpu[256];
   unsigned cycle_table_dsp[256];